Apparatus and method for testing semiconductors for cell to bitl

Details Apparatus and method for testing semiconductors for cell to bitl Apparatus and method for testing semiconductors for cell to bitl

1990-12-31

1993-03-30

Canney, Vincent P.

Excavating

371 213, 365201, G06F 1100

Patent

active

051990342

ABSTRACT:
A method of testing for cell to bitline leakage using an improved algorithm is disclosed. A selected portion of the bitlines, both true and complement, are changed. In this manner, the entire memory can be tested without regard to memory size. The prior algorithm used to perform this same function on a megabit dram would take about 570 seconds. The new procedure performs the same function in a more efficient manner, resulting in a test time of approximately 2.8 seconds which is over 200 times faster.

REFERENCES:
patent: 4956816 (1990-09-01), Atsumi et al.
patent: 5060230 (1991-10-01), Arimoto et al.
patent: 5079744 (1992-01-01), Tobita et al.

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