Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-08-30
2001-07-10
Metjahic, Safet (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S755090
Reexamination Certificate
active
06259264
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to semiconductor laser chips, and more particularly to a method and apparatus for testing bare laser chips that do not require a submount, carrier or wire bonding of the laser chips.
2. Description of the Related Art
A large number of applications utilize solid state lasers and amplifiers to generate or amplify light at specific wavelengths. Increasingly, laser diodes are employed for communications and are integral to optical disc recording and storage systems.
During production and fabrication of semiconductor laser chips, reliability tests are typically performed by the manufacturer on the semiconductor laser chips to screen out potential reliability hazards. Such testing typically requires the temperature of the laser chip be maintained at a predetermined temperature during the test. For example, present reliability testing of semiconductor lasers includes a test known as a purge of the laser chips. A laser chip has a threshold current I
th
at which it will lase, i.e., emit coherent light. To maintain reliability over the life of the laser chip, it is desirable for the threshold current I
th
to remain stable. A laser chip may have an initial threshold current of approximately 10 mA, for example. After the laser chip has been subjected to a purge, the threshold current I
th
at which a laser chip will lase may change. A change in the threshold current I
th
after the purge has been completed has been statistically shown to have a direct correlation to the long-term age rate, and hence reliability, of a laser chip. If the threshold current changes by more than some predetermined amount after the, purge, the expected life span of a laser chip can be statistically determined, and those laser chips which do not have a determined expected life span within a predetermined range will be discarded as unreliable. Thus, an upper limit for the change in threshold current I
th
after a purge is determined at which a laser chip will be considered unreliable.
A purge is typically performed by passing 150 mA through the laser chip, while maintaining the temperature of the laser chip at 85° C., for a period of 12 or 24 hours. After the purge is performed, the threshold current I
th
of the laser chip is measured and compared to the threshold current I
th
for the laser chip before the purge. If the threshold current I
th
has changed by more than the upper limit, the laser chip will be considered unreliable and be discarded. For example, the upper limit for a change in the threshold current I
th
may be 3 mA. Thus, if the laser chip with an initial threshold current of 10 mA has for example a threshold current of 13 mA or more after the purge, it will be considered unreliable and discarded.
FIG. 1
illustrates in block diagram form a typical mounting assembly necessary for performing a purge on a laser chip
10
. Laser chip
10
is solder bonded to a submount
12
, such as for example a silicon substrate. Submount
12
is soldered to a carrier
14
, such as a copper carrier, which facilitates good heat sinking of the laser chip
10
. Wire bonds
16
must be attached from the laser chip
10
to the submount
12
. The laser chip
10
is then subjected to a purge as described above.
There are problems, however, with the conventional mounting of a laser chip
10
to perform tests such as a purge. Every laser chip that is tested must be mounted as described with respect to
FIG. 1
above, i.e., soldered to a submount
12
(which is in turn soldered to a carrier
14
), and attached by wire bonds
16
. If the laser chip
10
passes the purge, the laser chip
10
/submount
12
assembly must be de-mounted from the carrier
14
and re-mounted to a final package. If the laser chip
10
does not pass the purge, the laser chip
10
/submount
12
assembly must still be de-mounted from the carrier
14
(and discarded) so that the carrier
14
can be reused. In either case the process of de-mounting is labor intensive, thus adding to manufacturing costs. Additionally, if the laser chip
10
fails the purge, the submount
12
is discarded with the laser chip
10
, thus increasing manufacturing costs for wasted parts.
The purge assembly process as described above has been streamlined by eliminating the need for the carrier
14
by providing heat sinking from the test device, or alternatively pulsing the purge current to the laser chip, thus allowing the purge to be performed with the laser chip
10
mounted on just the submount
12
. While this eliminates one process and handling step (mounting the chip/submount to the carrier), it does not address the issue of the labor required for the wire bonding and the wasted surmounts for laser chips that do not pass the purge.
Thus, there exists a need for an apparatus and method for performing tests on laser chips that are not labor intensive and will not result in wasted parts should the laser chip fail the test.
SUMMARY OF THE INVENTION
The present invention overcomes the problems associated with the prior art and provides an apparatus and method for performing tests on laser chips that are not labor intensive and will not result in wasted parts should the laser chip fail the test.
In accordance with one embodiment of the present invention, a “bare” laser chip is subjected to a test by placing the laser chip on an insulating material with an embedded conducting contact through which the current to power the laser chip is passed. The temperature of the laser chip is determined by measuring its operating wavelength. A cover plate provides a channel around the laser chip through which a jet of high pressure inert gas is passed to dissipate the self-heating of the laser chip that occurs during the test process. The laser chip is kept in place as the gas passes over it by physical pressure.
In accordance with another embodiment, the temperature of the laser chip is determined by measuring its operating wavelength and a thermo-electric cooler (TEC) is used to cool the laser chip to dissipate the self-heating that occurs during the test process.
In accordance with another embodiment, the temperature of the laser chip is measured by a thermistor and a thermo-electric cooler is used to cool the laser chip to dissipate the self-heating that occurs during the test process.
The test on the “bare” laser chip eliminates the need to solder bond the laser chip to a carrier and attach wire bonds to the laser chip, thus reducing associated labor and parts costs. These and other advantages and features of the invention will become apparent from the following detailed description of the invention which is provided in connection with the accompanying drawings, in which like items are referred to by like numerals.
REFERENCES:
patent: 5325052 (1994-06-01), Yamashita
patent: 6020750 (2000-02-01), Berger et al.
patent: 6137305 (2000-10-01), Freund et al.
Freund Joseph Michael
Gault William Andrew
Geary John Michael
Agere Systems Optoelectronics Guardian Corp.
Dickstein , Shapiro, Morin & Oshinsky, LLP
LeRoux Etlenne
Metjahic Safet
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