Apparatus and method for testing of integrated circuits

Details Apparatus and method for testing of integrated circuits Apparatus and method for testing of integrated circuits

1995-05-22

1998-03-10

Voeltz, Emanuel T.

Excavating

364483, 324537, 324765, G01R 3100, G01R 3128

Patent

active

057269971

ABSTRACT:
Current monitoring cells are located at selected locations on power supply lines within a chip. Each cell compares the current flow at predetermined times with a reference. If the current exceeds the reference, a signal is provided indicating a fault in the chip. A flip flop in the cell is set to maintain an indication of the fault condition. In two embodiments, the cells are connected with a scan chain which is used to sequentially access the test results for each cell. A third embodiment does not include the scan chain. A current divider may be included in each cell to isolate the voltage drop of the fault sensor from the functional circuit to minimize the impact of measuring the current for fault detection purposes.

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