Apparatus and method for testing interconnections between semico

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39518306, G01R 3128

Patent

active

057177015

ABSTRACT:
A boundary scan register allows for simplified testing of interconnections between integrated circuits. The interconnections between integrated circuits are characterized according to net type. Each net type has one or more mask registers that drive control inputs to each boundary scan register that drives a net of that type. One integrated circuit is configured to drive, while the others are configured to receive. The boundary scan registers are initialized to predetermined values, the mask registers are loaded, and clocks are pulsed to perform the needed tests. The results are then scanned out of the boundary scan registers, and a compression circuit compresses the test results data.

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Chan. J.C., et al, "Boundary Walking Sequences for Circuit Board Interconnect Test", IBM Technical Disclosure Bulletin, vol. 36 No. 11, Nov. 1993, pp. 19-22.

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