Multiplex communications – Data flow congestion prevention or control – Flow control of data transmission through a network
Reexamination Certificate
1997-12-18
2001-02-27
Vu, Huy D. (Department: 2739)
Multiplex communications
Data flow congestion prevention or control
Flow control of data transmission through a network
C370S447000
Reexamination Certificate
active
06195334
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present field relates to network switching and more particularly, to methods in controlling internal data transfers in a network switch for a half-duplex Ethernet (IEEE 802.3) packet switched network.
2. Background Art
Switched local area networks use a network switch for supplying data frames between network nodes such as network stations, routers, etc., where each network node is connected to the network switch by a media. The switched local area network architecture uses a media access control (MAC) layer enabling a network interface to access the media. The network switch passes data frames received from a transmitting node to a destination node based on the header information in the received data frame.
Proposals have been made to implement a network switch compliant with IEEE 802.3 by integrating a plurality of MAC devices and physical layer transceivers on a single chip. For example, a single integrated circuit may be configured to include a plurality of media access controllers having respective physical layer transceivers for communication with a network media. The integrated circuit also includes a plurality of transmit and receive buffers for temporarily storing the data for the respective MACs, and a plurality of bus interfaces configured for transferring data packets to and from the respective buffers onto a common bus. Such devices referred to as “Quad-MACs,” enable switch designers to implement a network switch by connecting the Quad-MACs to a shared bus serving the network switch fabric.
Such Quad-MAC devices are typically configured to request a DMA transfer on the shared bus when the number of bytes stored in the receive buffer equals the minimum packet size of at least 64 bytes. However, setting the threshold at 64 bytes before data transfer on the shared bus increases the latency of the data packet in the switch. The latency of the data packet is the time delay between the time the data packet is first received by an input network switch port and the time the data is output by an output switch port. Hence, latency increases when data transfer is deferred until at least 64 bytes of a data frame are received before data transfer is initiated.
Although the threshold of the receive buffer (referred to as the receive FIFO watermark) can be reduced to a value less than the minimum data packet length, the switch fabric may end up receiving a collision fragment or a runt packet, at which point the switch fabric needs to filter collision fragments and runt packets from valid data packets. A collision fragment could occur if the network port is connected to a shared medium connecting two network nodes, where the two network nodes simultaneously transmit a data packet on the shared medium.
Hence, reducing the latency by lowering the receive FIFO watermark level which triggers a DMA transfer request places a burden on the host processor to filter collision and runt packets. Hence, the host processor is forced to expend substantial resources analyzing each received stream of packet data to determine whether the received packet data is a valid data packet, or whether the received packet data is either a collision fragment or a runt packet.
SUMMARY OF THE INVENTION
There is a need for an arrangement in a network switch for reducing the latency of switched data packets while minimizing processing requirements by a host processor in filtering collision fragments and runt packets.
There is also a need for an arrangement in a network switch that enables a host system to efficiently filter collision fragments or invalid data packets.
These and other needs are attained by the present invention, where a network port requests a transfer based on a stored number of bytes reaching a prescribed threshold less than a minimum data packet length, and where a halt transfer signal is asserted by the network port in response to a detected collision to cause the network switch to halt transfer of the stored data in the receive buffer.
According to one aspect of the present invention, a method in a network switch having a plurality of network ports comprises receiving, by one of the network ports, header data of a data packet having at least address information. Each network port includes a media access controller (MAC) for receiving packet data from a corresponding physical layer interface coupled to network media and a receive buffer for storing packet data received by the MAC. The method further comprises storing the header data in the corresponding receive buffer, initiating transfer by the network switch of the stored data in the receive buffer of the one network port in response to a number of bytes of the stored header data reaching a prescribed threshold less than a minimum data packet length. detecting a collision on the media following the initiated transfer and during reception of packet data for the data packet following the header data, and asserting a halt transfer signal by the one network port in response to the detected collision to cause the network switch to halt transfer of the stored data in the receive buffer. Initiating transfer in response to the number of bytes reaching a prescribed threshold less than the minimum data packet length minimizes packet latency within the network switch. Moreover, generation of the halt transfer signal by the network port in response to the detected collision ensures that the transfer of invalid data throughout the switch is minimized. Hence, low latency is achieved without requiring substantial resources by the host processor to filter collision fragments. In addition, the network switch may begin transfer on another network port to minimize the lost throughput due to the initial transfer of the collision fragments.
Another aspect of the present invention provides a network switch comprising a plurality of network ports, each including a media access controller for receiving packet data from the corresponding physical layer transceiver, a receive buffer for storing the packet data received by the media access controller, and a bus interface for outputting the stored packet data from the corresponding receive buffer, the bus interface configured for outputting a transfer request in response to the stored packet data reaching a prescribed threshold less than a minimum packet length and a halt transfer signal in response to a collision detected by the corresponding media access controller during reception of the corresponding packet data, switching logic for outputting a data packet received by a first of the network ports to at least a second of the network ports based on corresponding address information in the data packet, a bus for transporting the received packet data between the network ports and the switching logic, and a bus controller configured for initiating a data transfer from one of the network ports in response to the corresponding transfer request, the bus controller halting the data transfer and initiating another data transfer with another one of the network ports in response to the halt transfer signal by the one network port. Generation of the transfer request based on a prescribed threshold less than the minimum packet length enables the network switch to maintain a low latency for switching data packets. Moreover, detection of the halt transfer signal by the bus controller enables the bus controller to immediately identify collision fragments, as well as initiate transfer on another network port requesting service to optimize throughput for valid data packets on the bus.
Additional objects, advantages and novel features of the invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
REFERENCES:
patent: 5568476 (1996-10-01), Sherer et al.
pat
Kadambi Jayant
Kalkunte Mohan V.
Advanced Micro Devices , Inc.
Nguyen Toan
Vu Huy D.
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