Electrical computers and digital processing systems: processing – Architecture based instruction processing – Data flow based system
Patent
1997-09-18
2000-04-25
An, Meng-Ai T.
Electrical computers and digital processing systems: processing
Architecture based instruction processing
Data flow based system
712 3, 712206, 712213, G06F 500
Patent
active
06055620&
ABSTRACT:
A control apparatus and method is provided for controlling operations of functional units in systems. The control apparatus and method implement a set of operations that can include dependencies between the functional units of a system to complete each operation. For example, in an asynchronous digital processor, self-timing and inter-block communication are used to implement a self-timed scheduler. The self-timed scheduler and method implement an instruction set using a plurality of functional units of the asynchronous digital processor. A scheduler can include a scheduler decoder that decodes each instruction to generate functional unit schedule and control information, a communication device and a plurality of scheduler functional unit controllers, wherein each of the scheduler functional unit controllers corresponds to one of the plurality of functional units of a system.
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Day Paul
Paver Nigel C.
An Meng-Ai T.
Cogency Technology Incorporated
El-Hady Nabil
LG Semicon Co. Ltd.
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