Apparatus and method for synchronizing a digital data clock in a

Details Apparatus and method for synchronizing a digital data clock in a Apparatus and method for synchronizing a digital data clock in a

1992-03-26

1994-03-29

Kuntz, Curtis

Pulse or digital communications

Spread spectrum

Direct sequence

375120, 328155, 307511, H03D 324, H04L 700

Patent

active

052978699

ABSTRACT:
A receiving apparatus for synchronising a digital data clock in a receiver with a digital data clock in a transmitter and a method therefor is disclosed which utilizes two phase-locked loops so as to improve accuracy and jitter performance. One of the phase-locked loops is locked onto positive edges in a received waveform and the other phase-locked loop is locked onto negative edges. The phase-locked loops independently decode the 1's and 0's in the data allowing the transmit data and clock to be readily recovered. Each of the phase-locked loops uses a decoding method in which mid-bit transitions in the encoded received waveform are detected in more than half of the sampling periods within one bit period which further improves the performance of the apparatus.

REFERENCES:
patent: 4984255 (1991-01-01), Davis et al.

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