Apparatus and method for synchronization of peripheral devices v

Details Apparatus and method for synchronization of peripheral devices v Apparatus and method for synchronization of peripheral devices v

1986-04-07

1986-12-09

Zache, Raulfe B.

Boots, shoes, and leggings

364900, G06F 1342

Patent

active

046284451

ABSTRACT:
Synchronization of peripheral operation with that of a processor in a multi-microprocessor implemented data processing system is achieved by bus cycle alteration. A logic circuit is provided for monitoring the condition of a peripheral's status bits and for preventing an appropriate processor control signal from completing the present bus cycle if the peripheral of interest is not able to accept an access. The peripheral of interest is readily identified by providing unique memory mapped locations, one for each system peripheral, that are responsively connected to the logic circuit.

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patent: 4156932 (1979-05-01), Robinson
patent: 4394727 (1983-07-01), Hoffman
patent: 4404628 (1983-09-01), Angelo
patent: 4426679 (1984-01-01), Yu
patent: 4449196 (1984-05-01), Pritchard

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