Apparatus and method for synchronization and error detection of

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371 471, H04L 700, H03M 1300

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active

056510152

ABSTRACT:
A method and apparatus for bit synchronization and error detection uses bit rotation of a received data burst and division by a polynomial generator to produce a syndrome. Syndrome corrector logic steps and circuitry determine the bit slippage and correct the syndrome for the slippage to produce an error syndrome. If there are no errors, the bit slippage value is used to synchronize the received data burst.

REFERENCES:
patent: 5084891 (1992-01-01), Ariyavisitakul et al.
Li-Fung Change & Nelson R. Sollenberger, Performance of a TDMA Portable Radio System Using a Block Code for Burst Synchronization and Error Detection, GLOBECOM '89: IEEE Global Telecommunications Conference, pp. 1371-1376 1989.
V. K. Varma, N. R. Sollenberger, L. F. Chang & H. W. Arnold, A Flexible Low-Delay TDMA Frame Structure, Communications, 1991 IEEE International Conference, pp. 1474-1479 1991.
N. R. Sollenberger, Justin C. I. Chuang, Li Fung Chang, & Sirikiat Ariyavisitakul, Architecture and Implementation of an Efficient and Robust TDMA FRame Structure for Digitable Portable Communications, IEEE Transactions on Behicular Technology, vol. 40, N Feb. 1991.
Li Fung Change, N. R. Sollenberger, & Sirikiat Ariyavisitakul, Performance of a TDMA Portable Radio System Using A Cyclic Block Code for Burst Synchronization and Error Detection, IEEE Transactions on Communications, vol. 41, No. 1, pp. 22-31 Feb. 1993.

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