Apparatus and method for switching capacitors within a switched

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341155, H03M 112

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active

057900647

ABSTRACT:
A D/A switched capacitor circuit, employed as part of a delta-sigma modulator, is provided. The modulator forms part of an A/D converter system, and the switched capacitor circuit is controlled by careful selection of clock phases. The clock phases, or more specifically four clock phases, are provided to ground both plates of switched capacitors within the D/A circuit subsequent to their discharge upon the integrator and prior to the next sampling period. Full discharge of shared capacitors to a ground voltage substantially eliminates any data dependent loading of integrator offset voltages upon the reference voltage supplies. Substantial reduction or elimination of data-dependent values prevents ac modulation of the referenced voltage supply and the imputed noise associated therewith.

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patent: 5039963 (1991-08-01), Fischer
patent: 5293169 (1994-03-01), Baumgartner et al.
patent: 5412387 (1995-05-01), Vincellette et al.
Ribner, et al., "A Third-Order Multi Stage Sigma-Delta Modulator With Reduced Sensitivity to Nonidealities", IEEE Journal of Solid-State Circuits, vol. 26, No. 12 (Dec. 1991), pp. 1764-1774.
Harris, Steven, "How to Achieve Optimum Performance from Delta Sigma A/D and D/A Converters", J. Audio Eng. Soc. vol. 41, No. (Oct. 1993), pp. 782-790.

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