Apparatus and method for supporting multiple interrupt protocols

Details Apparatus and method for supporting multiple interrupt protocols Apparatus and method for supporting multiple interrupt protocols

1995-06-06

1997-04-08

Harvey, Jack B.

395500, G06F 1324

Patent

active

056197039

ABSTRACT:
A peripheral device capable of generating interrupt request signals compliant with the Industry Standard Architecture (ISA) protocol, and the Peripheral Component Interconnect (PCI) protocol. The peripheral device comprises a signal generator block which selectively generates either the interrupt request signals of the PCI protocol or a set of bits representative of interrupt request signals of the ISA protocol. The set of bits are transferred serially to a converter circuit which generates the interrupt request signals of the ISA protocol based on the bits. The signal generator block generates bits in such a way as to support both pulse mode and level mode interrupt request signals for the ISA protocol.

REFERENCES:
patent: 4807282 (1989-02-01), Kazan et al.
patent: 4890219 (1989-12-01), Health et al.
patent: 5101498 (1992-03-01), Ehlig et al.
patent: 5237692 (1993-08-01), Raasch et al.
patent: 5349649 (1994-09-01), Iijima
patent: 5379403 (1995-01-01), Turvy
patent: 5446869 (1995-08-01), Padgett et al.
patent: 5506997 (1996-04-01), Maguire et al.

Affiliated with

Also associated with

Rating

Apparatus and method for supporting multiple interrupt protocols does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for supporting multiple interrupt protocols, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for supporting multiple interrupt protocols will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2403103