Apparatus and method for stacking integrated circuits

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S777000, C257S693000, C257SE25006, C257SE21614, C257SE23085

Reexamination Certificate

active

07902651

ABSTRACT:
A multi-chip stack module provides increased circuit density for a given surface chip footprint. The multi-chip stack module comprises support structures alternating with standard surface mount type chips to form a stack wherein the support structures electrically interconnect the chips. Various embodiments disclose a structure and method for interconnecting a plurality of generally planar chips in a vertical stack such that common signals are connected in the stack and individually-accessed signals are separated within the stack.

REFERENCES:
patent: 5128831 (1992-07-01), Fox, III et al.
patent: 5222014 (1993-06-01), Lin
patent: 5239198 (1993-08-01), Lin et al.
patent: 5362679 (1994-11-01), Wakefield
patent: 5400904 (1995-03-01), Maston, III et al.
patent: 5444296 (1995-08-01), Kaul et al.
patent: 5509200 (1996-04-01), Frankeny et al.
patent: 5514907 (1996-05-01), Moshayedi
patent: 5591941 (1997-01-01), Acocella et al.
patent: 5612570 (1997-03-01), Eide et al.
patent: 5656856 (1997-08-01), Kweon
patent: 5713744 (1998-02-01), Laub
patent: 5751063 (1998-05-01), Baba
patent: 5758413 (1998-06-01), Chong et al.
patent: 5783461 (1998-07-01), Hembree
patent: 5861666 (1999-01-01), Bellaar
patent: 6014316 (2000-01-01), Eide
patent: 6121676 (2000-09-01), Solberg
patent: RE36916 (2000-10-01), Moshayedi
patent: 6130823 (2000-10-01), Lauder et al.
patent: 6160718 (2000-12-01), Vakilian
patent: 6225688 (2001-05-01), Kim et al.
patent: 6473308 (2002-10-01), Forthun
patent: 6492714 (2002-12-01), Kasatani
patent: 6-77644 (1994-03-01), None
patent: 07-014980 (1995-01-01), None
patent: 2002-305286 (2002-10-01), None
patent: 411540 (2000-11-01), None
patent: WO 98/25301 (1998-06-01), None
patent: WO 99/57765 (1999-11-01), None
Edge-Mounted MLC Packaging Scheme, IBM Technical Disclosure Bulletin, May 1981, vol. 23, No. 12.

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