Pulse or digital communications – Multilevel – Bipolar signal
Reexamination Certificate
1998-09-30
2001-06-05
Pham, Chi (Department: 2631)
Pulse or digital communications
Multilevel
Bipolar signal
C375S257000, C375S288000, C375S289000, C341S068000
Reexamination Certificate
active
06243426
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to line circuits for transmitting digital data as an analog signal using zero drive, more particularly to a tri-state line driver configured for transmitting multilevel Transmission-3 (MLT-3) encoded signals.
2. Background Art
Local Area Networks (LANs) play a vital role in the successful and efficient operation f the modern office and find increasingly wide spread usage in the home. Users are able to exchange ideas and documents freely in a collaborative fashion. These exchanges take place in a variety of forms, from textual data to bandwidth intensive multimedia data. Accordingly, in an environment where multimedia information is commonly transferred, a high-speed network is needed to avoid unacceptably slow response times. Further, a LAN provides a cost-effective way to share resources such as printers, modems, etc. Manufacturers of LAN products continually develop faster, more reliable, and lower cost devices. One such LAN technology that addresses the growing need for high bandwidth is fast Ethernet, which supports the transmission of data signals at about 100 Mbps—ten times faster than traditional Ethernet LANs.
Local area networks use a network cable or other network media to link nodes (e.g., workstations, routers and switches) to the network. Each local area network architecture uses a media access control (MAC) enabling network interface device at each network node to share access to the media. Physical (PHY) layer devices are configured for translating digital packet data received from a MAC across a standardized interface, e.g., a Media Independent Interface (MII), into an analog signal for transmission on the network medium, and reception of analog signals transmitted from a remote node via the network medium. An example is the 100Base-TX Ethernet (IEEE Standard 802.3 u) transceiver, which is configured for transmitting and receiving a Multilevel Transmission-3 (MLT-3) encoded analog signal over unshielded (or shielded) twisted pair copper wiring.
In networks that employ unshielded twisted pair cabling, it is necessary to drive the unshielded twisted pair cable at high speed over a specific voltage swing. For a typical 100Base-TX network, the line driver is required to drive a 50 ohm load over a 2V swing at 125 Mbps. With these parameters, a large driver is needed, especially in light of the high transmission rate. Constructing a large driver yields a higher edge rate (i.e., slew rate), but ringing becomes problematic. It is thus a challenge to control the speed of the driver to attain a satisfactory edge rate while reducing or eliminating noise caused by the ringing effects. The noise is coupled from the driver to the near end receiver, which typically has power or ground closely coupled to that of the driver. The engineering trade-off thus is between speed and noise; i.e., a higher slew rate entails more noise coupling. Another key consideration is power consumption, which should be minimized while attaining a high edge rate with low noise characteristics.
In the past, the three factors of edge rate (slew rate), noise, and power consumption have been addressed separately. As shown in
FIG. 1
, a conventional line driver
100
has two stages: a pre-driver
101
and a final driver
103
. Within the pre-driver
101
, there exists a positive signal generator
101
a
and a negative signal generator
101
b
. These signal generators
101
a
,
101
b
control their larger counterparts, the signal generators
103
a
and
103
b
of the final driver
103
. The RC delay circuits
107
a
,
107
b
between the pre-driver
101
and final driver
103
attempt to address the edge rate requirement. Essentially, the RC circuits
107
a
,
107
b
serve to slow the edge rates of the pre-driver
101
. The edge rate of the final driver
103
is accordingly reduced. The outputs of the final driver
103
terminate at transformer
105
. Therefore, to alter the edge rate of the final output signals, the RC circuits
107
a
,
107
b
must be tuned. Tuning becomes difficult and inflexible once the RC circuits are fabricated in an integrated circuit. Post-fabrication tuning necessitates physically altering the circuit.
Another circuit, as in
FIG. 2
, attempts to address the need for noise reduction. Transistors
201
and
203
receive control signals (CTRL, CTRL#) at their respective gates. A resistor is needed between terminals
207
and
209
. A current source
205
is coupled to both transistors
201
,
203
. The noise problem is minimized by maintaining a constant current flow from power to ground.
Both of the above approaches require either extra transistors or RC components on the integrated chip, which is undesirable in terms of chip area and cost of having additional components. Moreover, the component values have to be fine tuned, which is a difficult and costly process, to adapt to various applications once the line driver circuit is fabricated. In addition, power considerations are usually examined after the performance objectives of slew rates and noise levels are obtained. Thus, circuit power consumption may be less than optimal.
SUMMARY OF THE INVENTION
There is a need for an arrangement for transmitting MLT-3 encoded signals that achieves a high slew rate (edge rate), while reducing noise. There is also a need for an arrangement for generating MLT-3 signals that exhibits low power consumption.
These and other needs are attained by the present invention, where a line circuit is made up of two driver stages for transmitting encoded data signals: a pre-driver system, and a final driver. The pre-driver system is made up of a plurality of individual pre-drivers arranged in parallel. A zero drive logic designates any number of individual pre-drivers as zero drive capable, such that these designated zero drive pre-drivers are turned ON (i.e., activated) during a zero signaling state. Typically, because the individual pre-drivers are not all zero drive pre-drivers, the pre-driver system causes the final driver to be partially ON. This permits the final driver to rapidly output positive and negative signals in accord with the MLT-3 signaling protocol.
According to one aspect of the present invention, a line circuit for transmitting encoded signals comprises a pre-driver circuit, which comprises (1) positive pre-driver stages for outputting positive pre-drive output signals in response to the first input signals, respectively, and (2) negative pre-driver stages for outputting negative pre-drive output signals in response to the second pre-driver input signals, respectively. The pre-driver circuit outputs a positive collective signal based on the positive pre-drive output signals and a negative collective signal based on the negative pre-drive output signals. A pre-driver control logic generates the first and second input signals based on a first driver signal and a second driver signal. Further, the pre-driver control logic selects at least one of the positive pre-driver stages and at least one of the negative pre-driver stages for outputting the respective positive and negative pre-drive output signals in response to a zero state in the first and second driver signals. An output driver generates first and second output signals as the encoded signals in response to the positive and negative collective signals, respectively. The output of the positive and negative pre-drive output signals during the zero state ensures that the output driver is partially activated during the zero state. Hence, the slew rate of the encoded signals is significantly enhanced, while the noise level is minimized.
Another aspect of the present invention provides a line circuit for transmitting encoded signals. The line circuit comprises a pre-driver circuit configured for generating a collective positive input signal and a collective negative input signal. The pre-driver circuit comprises a plurality of individual pre-drivers whereby each of the individual pre-drivers comprises a positive signal generator and a negative signal genera
Cheng Yi
Lo William
Advanced Micro Devices , Inc.
Lachhab Mohammed
Pham Chi
LandOfFree
Apparatus and method for slew rate control of MLT-3... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for slew rate control of MLT-3..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for slew rate control of MLT-3... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2444371