Apparatus and method for signal processing

Pulse or digital communications – Spread spectrum – Direct sequence

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Details

375 4, 375108, 375110, 328 63, 328 72, 328127, H03D 324, H04L 702

Patent

active

047334045

ABSTRACT:
A transmission control circuit for use in a data terminal equipment receiver section is disclosed. The output of a phase locked loop or narrow band tuned filter input register clocking circuit which includes a quasi-differentiator and full wave rectifier is sent to a divider circuit and the divided clocking signal is then quasi-differentiated, full-wave rectified and used to drive a signal source circuit. The signal source circuit output has a polarity which is determined by the signal output of the full wave rectifier and is integrated and fed back to control inputs of the quasi-differentiators. An offset signal is also provided to the integrator. The result is an automatic adjustment of the pulse width to a fixed fraction of the input bit period.

REFERENCES:
patent: 3209261 (1965-09-01), Critchlow
patent: 3512093 (1970-05-01), Perreault
patent: 3611161 (1971-10-01), Claxton

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