Apparatus and method for serial data communication between plura

Details Apparatus and method for serial data communication between plura Apparatus and method for serial data communication between plura

1996-04-03

1999-10-05

Chin, Stephen

Pulse or digital communications

Miscellaneous

39520005, 39520001, H04L 2300

Patent

active

059636092

ABSTRACT:
An apparatus for serial data communication between a plurality of IC chips with a reduced number of inter-chip signal lines. In the apparatus, one IC chip acts as a master, while the other chip(s) are slaved to it. In response to conditions internal to the master chip or in response to a request from at least one of the slave chips, the master chip generates a transfer control signal and a synchronization clock signal. The transfer control signal defines a transfer phase during which data transfer among the chips can take place. The chips take turns sending and receiving data in a multiplexed fashion, with sending and receiving parties designated by a count of synchronization clock signal cycles. The synchronization clock signal is generated at a high frequency, to allow fast data transfer.

REFERENCES:
patent: 4633489 (1986-12-01), Morishita
patent: 5555548 (1996-09-01), Iwai et al.
patent: 5608357 (1997-03-01), Ta et al.

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