Measuring and testing – Inspecting
Patent
1997-06-20
2000-06-13
Raevis, Robert
Measuring and testing
Inspecting
G01N 2188
Patent
active
060735015
ABSTRACT:
An apparatus and method are presented for performing a wafer fabrication operation upon each of a plurality of semiconductor wafers which facilitate determination of a source of semiconductor wafer contaminants or defects. A wafer fabrication tool of the present invention includes a process chamber for processing a semiconductor wafer and a wafer handling system for transporting the semiconductor wafer between a wafer cassette and the process chamber. Semiconductor wafers contained within the wafer cassette are assigned numbers and processed one after another in a predetermined order. The wafer handling system is configurable to remove semiconductor wafers from the wafer cassette for processing in the predetermined order. One embodiment of the wafer handling system includes a mechanical hand for gripping a semiconductor wafer and a mechanical arm coupled to the mechanical hand for positioning the mechanical hand. The process chamber of the wafer fabrication tool may be, for example, a deposition chamber, an etch chamber, a spin coat chamber, a furnace, a diffusion chamber, an oxidation chamber, or an ion implantation chamber. In the present method, a unique wafer processing order is selected for each wafer fabrication tool, and each wafer fabrication tool is configured to implement the corresponding wafer processing sequence. Graphs of the number of contaminants (or defects) in the wafers verses wafer number generated for each of the wafer processing sequences may be analyzed to determine if one wafer fabrication tool introduced more contaminants into the wafers than the other wafer fabrication tools.
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Advanced Micro Devices , Inc.
Daffer Kevin L.
Kowert Robert C.
Raevis Robert
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