Apparatus and method for sampling rate conversion

Coded data generation or conversion – Digital code to digital code converters – Data rate conversion

Reexamination Certificate

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C341S144000

Reexamination Certificate

active

06624765

ABSTRACT:

This application claims priority to German Patent Application 101 05 256.1, filed Feb. 6, 2001, the entire contents of which are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to an apparatus for converting a digital input signal sequence with an input sampling rate into a digital output signal sequence with an output sampling rate which differs from the input sampling rate. Such an apparatus is generally referred to as a resampler. The invention furthermore relates to a corresponding method.
2. Related Art
Such a resampler is disclosed for example in EP 0 665 546 A2. In a resampler, it is necessary firstly to detect the ratio of the input sampling rate to the output sampling rate. This is done by way of a gate time measurement in the document mentioned above. In an interpolator the samples are interpolated from the samples of the input signal sequence at the output sampling instants predetermined by the output sampling rate. In this case, the interpolator is controlled by the detected sampling rate ratio. Since the detection of the sampling rate ratio is subject to measurement inaccuracies, buffering in a buffer memory, for example a FIFO, is effected at the output of the interpolator in the case of down-sampling and at the input of the interpolator in the case of up-sampling. The integral behavior of the FIFO memory is utilized in this case. EP 0 665 546 A1 proposes controlling the sampling rate ratio, which drives the interpolator, in a manner dependent on the occupancy of the buffer memory.
The control of the sampling rate ratio in a manner dependent on the occupancy of the buffer memory as proposed in EP 0 665 546 A2 has the disadvantage that when the occupancy of the buffer memory changes, the group delay of the digital signal through the resampler changes. In the case of application e.g. in mobile radio technology, relatively large changes in occupancy of the buffer memory of (e.g. +/−1), i.e. a change by a memory unit, are unacceptable since they lead to delay fluctuations in the signal through the resampler. In the case of the occupancy controller of the buffer memory which is proposed in EP 0 665 546 A1, deviations of the clock rate ratio are identified relatively late, when a relatively large detuning of the ratio has already taken place. This leads to larger interpolation errors on account of incorrect sampling instants.
A resampler with phase estimation but without overlapping observation intervals is described in DE 101 02 166 A1, which was published after the priority date.
SUMMARY OF THE INVENTION
The present invention is based on the object of providing an apparatus (resampler) and a method (resampling method) for converting a digital input signal sequence with an input sampling rate into a digital output signal sequence with an output sampling rate, which apparatus and which method operate with high accuracy.
An object is achieved by way of the features of claim
1
with regard to the apparatus, and by way of the features of claim
5
with regard to the method. The dependent claims contain advantageous developments of the apparatus and of the method, respectively.
The present invention is based on the insight that the accuracy in the driving of the interpolator or the definition of the sampling instants of the output signal sequence can be considerably increased if the control is effected not only on the basis of an estimation of the sampling rate ratio between the input sampling rate and the output sampling rate but at the same time on the basis of an estimation of the phase angle with overlapping observation intervals. Through the phase-coherent control according to the present invention, a deviation of the sampling rate ratio is already detected before said deviation is so large that it leads to an increase or decrease in the memory level in the buffer memory (FIFO). A large change, associated with the memory level change, in the group delay through the resampler is thus avoided and the interpolation accuracy of the interpolator is increased. The reaction time of the control is shortened by virtue of the overlapping observation intervals.


REFERENCES:
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patent: 5786778 (1998-07-01), Adams et al.
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patent: 6215839 (2001-04-01), Lin
patent: 6518894 (2003-02-01), Freidhof
patent: 0 665 546 (1995-08-01), None
US application No. 10/045,161, Freidhof et al., “Device and mehod for sampling rate conversion”, filing date Jan. 15, 2002.

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