Electrical computers and digital processing systems: processing – Byte-word rearranging – bit-field insertion or extraction,...
Patent
1997-04-29
1999-11-16
Ellis, Richard L.
Electrical computers and digital processing systems: processing
Byte-word rearranging, bit-field insertion or extraction,...
712223, 708209, G06F 700
Patent
active
059876034
ABSTRACT:
An instruction (also called a "bit reversal instruction") for reversing the order of bits in an input signal is implemented by reusing one or more components in a datapath normally found in a processor. Specifically, a bit reversal instruction is implemented by reuse of a shifter unit normally used in a datapath to shift bits of an input signal. The shifter unit includes three stages: a first stage formed by a number of input multiplexers, a second stage formed by, for example, a left shifter, and a third stage formed by a number of output multiplexers. When using a left shifter to implement the bit reversal instruction, the input multiplexers are not used. Instead, the left shifter is used to shift bits of the input signal left by a number that is inverse of the number of bits to be reversed. Thereafter, the output multiplexers reverse the order of bits generated by the left shifter, thereby completing the bit reversal instruction. The shifter unit also implements a shift left instruction and a shift right instruction in the normal manner. Instead of using a left shifter, a right shifter can be used to implement the bit reversal instruction, wherein input multiplexers are used to reverse the order of bits, and output multiplexers are not used.
REFERENCES:
patent: Re33664 (1991-08-01), Kang et al.
patent: 4122534 (1978-10-01), Cesaratto
patent: 5262971 (1993-11-01), Yamaguchi
patent: 5682340 (1997-10-01), Arends et al.
Neil H.E. Weste et al., "Principles of CMOS VLSI Design A Systems Perspective", Second Edition, Addison-Wesley Publishing Company 1993, pp. 560-563.
Choi Glen B.
Ellis Richard L.
LSI Logic Corporation
Suryadevara Omkar K.
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