Apparatus and method for residual error clock skew bound, and cl

Details Apparatus and method for residual error clock skew bound, and cl Apparatus and method for residual error clock skew bound, and cl

1994-12-29

1996-08-27

Bocure, Tesfaldet

Pulse or digital communications

Synchronizers

Network synchronizing more than two stations

3701001, H04L 700

Patent

active

055508758

ABSTRACT:
Multiple clocks are interconnected in a network which is fed and controlled by a clock generator. A delay of one or more clock periods less a fixed amount is imposed between any two such clocks excluding the clock generator, to cause the repeated clock so transferred to occur at the appropriate time in the next cycle. Feedback using such delays assures bounded phase differences among these clocks. Thus, skew bounds can be provided for large numbers of clocks, to provide a bounded delay among multiple clocks. There is inserted in each link between a pair of clock nodes a delay line that delays a propogating clock signal by just enough time to cause the repeated clock to occur at the appropriate time in the next cycle, thereby synchronizing the appearance of that clock signal at the various nodes. Self-oscillation of the system, if the clock generator is removed, is avoided by having the delay between any two directly connected nodes be greater than one period of that clock generator.

REFERENCES:
patent: 4142069 (1979-02-01), Stover
patent: 5051990 (1991-09-01), Kato
patent: 5117424 (1992-05-01), Cohen et al.
patent: 5163068 (1992-11-01), El-Amawy
patent: 5406559 (1995-04-01), Edem et al.
patent: 5432823 (1995-07-01), Gasbarro et al.

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