Boots – shoes – and leggings
Patent
1995-05-17
1996-06-04
Geckil, Mehmet
Boots, shoes, and leggings
395375, 364DIG1, 364247, 3642318, 3642563, 3642624, G06F 930
Patent
active
055242626
ABSTRACT:
A bypass mechanism within a register alias table unit (RAT) for handling source-destination dependencies between operands of a given set of operations issued simultaneously within a superscalar microproessor. Operations of the given set are presented in program order and data dependencies occur when a source register of particular operation is also utilizes as a destination register of a preceding operation within the given set of operations. At this occurence, the initial read of the RAT unit will not have supplied the most current rename of the source register. The present invention includes a comparison mechanism to detect this condition. Also included is a bypass mechanism for bypassing the physical source register output by the initial read of the RAT unit with a recently allocated physical destination register assigned to the preceding operation having the matched physical destination register. In general the RAT unit provides register renaming to provide a larger physical register set than would ordinarily be available within a given macroarchitecture's logical register set (such as the Intel architecture or PowerPC or Alpha designs, for instance) to eliminate false data dependencies that reduce overall superscalar processing performance for the microprocessor. The bypass mechanism of the present invention handles both floating point and integer registers and, in addition, a second bypass mechanism is included in the RAT priority write operation.
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Mike Johnson, entitled, "Superscala Microprocessor Design", Advance Micro Devices, Prentice Hall Series in Innovative Technology, 1991, pp. 1-289.
Colwell Robert P.
Glew Andrew F.
Geckil Mehmet
Intel Corporation
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