Apparatus and method for reducing the leakage current of...

Details Apparatus and method for reducing the leakage current of... Apparatus and method for reducing the leakage current of...

2007-03-15

2008-12-23

Phung, Anh (Department: 2824)

Static information storage and retrieval

Powering

Conservation of power

C365S154000, C365S189011

Reexamination Certificate

active

07468930

ABSTRACT:
The energy consumption of a static memory cell, which may be connected to a first bit line and a second bit line of a bit line pair by means of transistors, is reduced in an energy-saving mode of operation by adjusting the potentials on each of the bit lines of the bit line pair such that a potential difference between the gate terminals of the transistors and the bit lines of the bit line pair is reduced in comparison with a normal mode of operation.

REFERENCES:
patent: 6845026 (2005-01-01), Gharia
patent: 7102915 (2006-09-01), Sohn
patent: 2005/0185448 (2005-08-01), Lin
patent: WO-2005/006340 (2005-01-01), None
R.W. Mann et al.; “Ultralow-power SRAM technology”; IBM J. Res & Dev., vol. 47, No. 5/6, Sep./Nov. 2003.

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