Apparatus and method for reducing removal forces for CMP pads

Adhesive bonding and miscellaneous chemical manufacture – Differential fluid etching apparatus – For liquid etchant

Reexamination Certificate

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C451S066000

Reexamination Certificate

active

06814834

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to polishing methods and apparatus. More particularly, the invention pertains to apparatus and methods for polishing and planarizing semiconductor wafers, optical lenses and the like.
2. State of the Art
In the manufacture of semiconductor devices, it is important that the surface of a semiconductor wafer be planar.
For high density semiconductor devices having features with extremely small sizes, i.e. less than 1 &mgr;m, planarity of the semiconductor wafer is particularly critical to the photolithographic forming of the extremely small conductive traces and the like.
Methods currently used for planarization include (a) reflow planarization, (b) application of a sacrificial dielectric followed by etch back planarization, (c) mechanical polishing, and (d) chemical-mechanical polishing (CMP). Methods (a) through (c) have some applications but have disadvantages for global wafer planarization, particularly when fabricating dense, high speed devices.
In U.S. Pat. No. 5,434,107 of Paranjpe, a planarization method consists of applying an interlevel film of dielectric material to a wafer—and subjecting the wafer to heat and pressure so that the film flows and fills depressions in the wafer, producing a planar wafer surface. An ultraflat member overlying the dielectric material ensures that the latter forms a flat surface as it hardens. The ultraflat member has a non-stick surface such as polytetrafluoroethylene so that the interlevel film does not adhere thereto.
In a similar method shown in European Patent Publication No. 0 683 511 A2 of Prybyla et al. (AT&T Corp.), a wafer is covered with a hardenable low-viscosity polymer and an object with a highly planar surface is placed in contact with the polymer until the polymer is cured. The object is separated from the polymer, which has cured into a highly planar surface.
The planarization method of choice for fabrication of dense integrated circuits is typically chemical-mechanical polishing (CMP). This process comprises the abrasive polishing of the semiconductor wafer surface in the presence of a liquid or slurry.
In one form of CMP, a slurry of an abrasive material, usually combined with a chemical etchant at an acidic or alkaline pH, polishes the wafer surface in moving compressed planar contact with a relatively soft polishing pad or fabric. The combination of chemical and mechanical removal of material during polishing results in superior planarization of the polished surface. In this process it is important to remove sufficient material to provide a smooth surface, without removing an excessive quantity of underlying materials such as metal leads. It is also important to avoid the uneven removal of materials having different resistances to chemical etching and abrasion.
In an alternative CMP method, the polishing pad itself includes an abrasive material, and the added “slurry” may contain little or no abrasive material, but is chemically composed to provide the desired etching of the surface. This method is disclosed in U.S. Pat. No. 5,624,303 of Robinson, for example.
Various methods for improving wafer planarity are directed toward the application of interlayer materials of various hardness on the wafer surface prior to polishing. Such methods are illustrated in U.S. Pat. No. 5,618,381 of Doan et al., U.S. Pat. No. 5,639,697 of Weling et al., U.S. Pat. No. 5,302,233 of Kim et al., U.S. Pat. No. 5,643,837 of Hayashi, and U.S. Pat. No. 5,314,843 of Yu et al.
The typical apparatus for CMP polishing of a wafer comprises a frame or base on which a rotatable polishing pad holder or platen is mounted. The platen, for example, may be about 20-48 inches (about 50-122 cm) or more in diameter. A polishing pad is typically joined to the platen surface with a pressure-sensitive adhesive (PSA).
One or more rotatable substrate carriers are configured to compress e.g. semiconductor wafers against the polishing pad. The substrate carrier may include non-stick portions to ensure that the substrate, e.g. wafer, is released after the polishing step. Such is shown in U.S. Pat. No. 5,434,107 of Paranjpe and U.S. Pat. No. 5,533,924 of Stroupe et al.
The relative motion, whether circular, orbital or vibratory, of the polishing pad and substrate in an abrasive/etching slurry may provide a high degree of planarity without scratching or gouging of the substrate surface, depending upon wafer surface conditions. Variations in CMP apparatus are shown in U.S. Pat. No. 5,232,875 of Tuttle, U.S. Pat. No. 5,575,707 of Talieh, U.S. Pat. No. 5,624,299 of Shendon, U.S. Pat. No. 5,624,300 of Kishii et al., U.S. Pat. No. 5,643,046 of Katakabe et al., U.S. Pat. No. 5,643,050 of Chen, and U.S. Pat. No. 5,643,406 of Shimomura et al.
In U.S. Pat. No. 5,575,707 of Talieh et al., a wafer polishing system has a plurality of small polishing pads which together are used to polish a semiconductor wafer.
As shown in U.S. Pat. No. 5,624,304 of Pasch et al., the polishing pad may be formed in several layers, and a circumferential lip may be used to retain a desired depth of slurry on the polishing surface.
A CMP polishing pad has one or more layers and may comprise, for example, felt fiber fabric impregnated with blown polyurethane. Other materials may be used to form suitable polishing pads. In general, the polishing pad is configured as a compromise polishing pad—that is a pad having sufficient rigidity to provide the desired planarity, and sufficient resilience to obtain the desired continuous tactile pressure between the pad and the substrate as the substrate thickness decreases during the polishing process.
Polishing pads are subjected to stress forces in directions both parallel to and normal to the pad-substrate interfacial surface. In addition, pad deterioration may occur because of the harsh chemical environment. Thus, the adhesion strength of the polishing pad to the platen must be adequate to resist the applied multidirectional forces during polishing, and chemical deterioration should not be so great that the pad-to-platen adhesion fails before the pad itself is in need of replacement.
Pores or depressions in pads typically become filled with abrasive materials during the polishing process. The resulting “glaze” may cause gouging of the surface being polished. Attempts to devise apparatus and “pad conditioning” methods for removing such “glaze” materials are illustrated in U.S. Pat. No. 5,569,062 of Karlsrud and U.S. Pat. No. 5,554,065 of Clover.
In any case, polishing pads are expendable, having a limited life and requiring replacement on a regular basis, even in a system with pad conditioning apparatus. For example, the working life of a typical widely used CMP polishing pad is about 20-30 hours.
Replacement of polishing pads is a difficult procedure. The pad must be manually pulled from the platen, overcoming the tenacity of the adhesive which is used. The force required to manually remove a 30-inch diameter pad from a bare aluminum or ceramic platen may exceed 100 lbf (444.8 Newtons) and may be as high as 150 lbf (667.2 Newtons) or higher. Manually applying such high forces may result in personal injury as well as damage to the platen and attached machinery.
SUMMARY OF THE INVENTION
The invention comprises the application of a permanent, low adhesion, i.e. “non-stick,” coating of uniform thickness to the platen surface. Exemplary of such coating materials are fluorinated compounds, in particular fluoropolymers including polytetrafluoroethylene (PTFE) sold under the trademark TEFLON by DuPont, as well as polymonochlorotrifluoroethylene (CTFE) and polyvinylidene fluoride (PVF
2
). The coating retains its tenacity to the underlying platen material, and its relatively low adhesion to other materials, at the temperatures, mechanical forces, and chemical action encountered in CMP processes.


REFERENCES:
patent: 5232875 (1993-08-01), Tuttle et al.
patent: 5302233 (1994-04-01), Kim et al.
patent: 5314843 (1994-05-01), Yu et al.
patent: 5434107 (1995-07-01), Paranjpe
patent: 5533924

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