Active solid-state devices (e.g. – transistors – solid-state diode – Contacts or leads including fusible link means or noise...
Reexamination Certificate
2007-02-28
2010-11-16
Vu, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Contacts or leads including fusible link means or noise...
C257S296000, C257S533000, C257SE27033, C257SE27045
Reexamination Certificate
active
07834428
ABSTRACT:
Apparatus and a method are provided for reducing noise in mixed-signal and digital circuits. One apparatus (200) includes a metal-oxide-semiconductor field-effect transistor (MOSFET) (210). MOSFET (210) includes a doped substrate (2210) with a source formed proximate a substrate tie (2224) and a substrate tie (2250) adjacent substrate (2210). A ground rail (255) is coupled to the source and substrate tie (2224), and a ground rail (285) is coupled to substrate tie (2250). Ground rails (255) and (285) are configured to be coupled to different ground networks (250and280). One method includes producing a model of a semiconductor device including a standard semiconductor cell (710). The semiconductor cell is identified as a noise-sensitive or a noise-producing semiconductor cell (720), and the semiconductor cell is replaced with a corresponding noise-aware semiconductor cell (730).
REFERENCES:
patent: 4327368 (1982-04-01), Uchida
patent: 4672584 (1987-06-01), Tsuji et al.
patent: 4805008 (1989-02-01), Yao et al.
patent: 4922317 (1990-05-01), Mihara
patent: 5014105 (1991-05-01), Hata et al.
patent: 5122855 (1992-06-01), Shirai
patent: 5317183 (1994-05-01), Hoffman et al.
patent: 5338986 (1994-08-01), Kurimoto
patent: 5475255 (1995-12-01), Joardar et al.
patent: 5714796 (1998-02-01), Chishiki
patent: 5864168 (1999-01-01), Nasserbakht
patent: 5892263 (1999-04-01), Tachiyama
patent: 6020614 (2000-02-01), Worley
patent: 6995431 (2006-02-01), Fujimori
patent: 7397641 (2008-07-01), Chu et al.
Salman et al., Substrate Noise Reduction Based on Noise Aware Cell Design, IEEE, 2007, pp. 3227-3230.
Kao et al., Digital Block Modeling and Substrate Noise Aware Floorplanning for Mixed Signal SOCs, IEEE, 2007, pp. 1935-1938.
Lee et al., Noise-Aware Design for ESD Reliability in Mixed-Signal Integrated Circuits, IEEE, 2001, pp. 437-441.
Popovich et al., Noise Aware Decoupling Capacitors for Multi-Voltage Power Distribution Systems, ISQED, 2005, 6 pages.
Nagata, M. et al., Quantitive Characterization of Substrate Noise for Physical Design Guides in Digital Circuits, Proceedings of IEEE Custom Integrated Circuits Conference, pp. 95-98, 2000.
D'Abreum M., Noise, Its source, and impact on Design and Test of Mixed Signal Circuits, Proceedings of the first IEEE international Workshop on Electronic Design, Test and Application, 2002.
Hartin Olin L.
Salman Emre
Secareanu Radu M.
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz P.C.
Taylor Earl N
Vu David
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