Apparatus and method for recovery of symbol timing for asynchron

Details Apparatus and method for recovery of symbol timing for asynchron Apparatus and method for recovery of symbol timing for asynchron

1995-11-28

1998-08-04

Chin, Stephen

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

370503, H04L 700

Patent

active

057906076

ABSTRACT:
An apparatus and method for recovery of symbol timing for asynchronous data transmission utilizes an RF downconverter (11), an A/D converter (12), and a digital signal processor (14). The digital signal processor (14) includes an error detection block (130), a timing correction block (135), a counter (140), a programmable capture register (145), a clock (150) to produce clock signals, and preferrably a differential detector (155). The error detection block (130) provides information, an error parameter, concerning phase and frequency variances between the clock signal and a transmitted signal. The timing correction block (135) utilizes the error parameter to determine an updated, programmable value stored in the programmable capture register (145). When the counter (140) reaches an instantaneous value equal to the programmable value in the programmable capture register (145), an interrupt signal is generated which adjusts the timing of the clock signal and the clocking of digital samples of the transmitted signal.

REFERENCES:
patent: 5001727 (1991-03-01), McDavid
patent: 5164965 (1992-11-01), Karaali
patent: 5572558 (1996-11-01), Beherns

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