Boots – shoes – and leggings
Patent
1994-01-11
1995-07-18
Mai, Tan V.
Boots, shoes, and leggings
G06F 102
Patent
active
054348064
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND
The present invention relates to an apparatus for random number generation comprising a feedback shift register which receives signals from a first signalling device, the feedback shift register being connected to at least one clocked delay device which upon receiving a clock signal from a second signalling device produces a random number. Such devices find their use within e.g. radiocommunication, for production of crypto-keys etc. The requirements are that random numbers, both random numbers produced by one and the same apparatus as well as random numbers produced by different apparatuses are as uncorrected and unpredictable as possible.
There is furthermore often a need of a random number generator which may be integrated in an LSI (Large Scale Integration)-circuit.
An apparatus of the abovementioned kind is given by U.S. Pat. No. 4,905,176. In this known apparatus On-Chip noise- sources are used as a first signalling device. Such On-Chip noise sources are both difficult and expensive to fabricate. Moreover they consume much current. Furthermore the random numbers which are generated by this apparatus do not originate from external events but depend on parameters of the LSI such as for example material and constitution, the circumstances prevailing at its fabrication and so on. Since the random numbers come directly from the outputs of a large PN-register, different apparatuses which are started up and driven simultaneously will generate the same random number. Moreover, different inputs from the same PN sequence are used as the input to the logical gate (XOR). A further inconvenience with this apparatus is that the random numbers merely can be obtained in series and not in parallel.
In other known apparatuses noise diodes are used which generate noise which is amplified and quantified. In this manner generated random numbers are read by a computer. Random number generators of this kind require a large number of discrete and integrated components and it is furthermore not possible to integrate the whole random number generator in an LSI. Furthermore these apparatuses require high voltages, such as approximately 20 V as well as high currents, e.g. more than 50 mA.
SUMMARY
It is an object of the present invention to provide an apparatus for generation of random numbers which give as good and uncorrelated random numbers as possible, and wherein different apparatuses produce different random numbers. It is furthermore an object of the invention to provide an apparatus which does not require high currents and which only requires a low voltage. Preferably the apparatus consumes less than 1 mA and merely requires about 5 V. A further object of the invention is to provide a random number generator which is entirely digital, easy to integrate, particularly in an LSI, and which can be fabricated in a cheap way and by cheap components.
These objects as well as others are achieved through an apparatus of the aforementioned kind wherein the first signalling device comprises a fast clock, the feedback shift register is connected to the delay device/devices via at least one logical gate, the output(s) delay device(s) further being fed back to said gate/gates, and wherein clocking signals from the second signalling device originate from external events.
It is also an object of the invention to provide a method for generation of random numbers by which the foregoing mentioned objects are achieved.
The objects are achieved through a method wherein a random number generated by one apparatus is independent of a random number simultaneously generated by another apparatus, wherein a PN-register receives a clocking signal from a first signalling device, the PN-register being connected to at least one delay device, preferably a D-flip-flop which from a second signalling device receives an asynchronous, external signal and which thereupon produces a random number, wherein the data entrance of the delay device is connected to the PN-register via a logical gate, preferably an XOR-gate, the output from the delay dev
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"Integrated Circuit Compatible Random Number Generator" IBM Technical Disclosure Bulletin, vol. 30, No. 11, pp. 333-335 (Apr. 1988).
J. Saarinen et al., "VLSI Implementation of Tausworthe Random Number Generator for Parallel Processing Environment" IEEE Proceedings-E, vol. 138, No. 3, pp. 138-146 (May 1991).
Mai Tan V.
Telefonaktiebolaget LM Ericsson
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