Apparatus and method for providing multi-mode clock signals

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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C327S112000, C327S156000, C327S291000, C327S296000, C326S087000, C326S086000

Reexamination Certificate

active

07961014

ABSTRACT:
Apparatus and methods for providing multi-mode clock signals are disclosed. In some embodiments, a multi-mode driver configured to receive a first clock signal, and to selectively output a different clock signal in response to one or more signals from a controller is provided. The driver can include an H-bridge circuit without substantial increases in the size of the design area. Advantageously, lower jitter and improved impedance matching can be accomplished.

REFERENCES:
patent: 6437599 (2002-08-01), Groen
patent: 6590422 (2003-07-01), Dillon
patent: 6700403 (2004-03-01), Dillon
patent: 6856178 (2005-02-01), Narayan
patent: 6885227 (2005-04-01), Agrawal et al.
patent: 6885277 (2005-04-01), Tung
patent: 7061269 (2006-06-01), Agrawal et al.
patent: 7061273 (2006-06-01), Wang et al.
patent: 7183805 (2007-02-01), Wang et al.
patent: 7215148 (2007-05-01), Johnson et al.
patent: 7397270 (2008-07-01), Luo et al.
patent: 7609097 (2009-10-01), Leonowich et al.
patent: 7724037 (2010-05-01), Cho et al.
patent: 2004/0246026 (2004-12-01), Wang et al.
patent: 2006/0285702 (2006-12-01), Felder
Dual Input Network Clock Generator/Synchronizer, Analog Devices, AD9549, Aug. 2007, 68 pages, available at http://www.analog.com/static/imported-files/Data—Sheets/AD9549.pdf.
High-speed transceiver logic, Wikipedia, Accessed on Aug. 13, 2009, at http://en.wikipedia.org/wiki/Hstl.
Altera Corporation, I/O Standard Specifications, HardCopy Series Handbook, vol. 1, Sep. 2007, p. 4-7 to 4-15.
Interfacing LVDS to PECL, LVPECL, CML, RS-422 and single-ended devices. Application Note 47, Pericom, Feb. 6, 2002. 5 pages, available at www.pericom.com/pdf/applications/AN047.pdf.
Multiservice Clock Generator, Analog Devices, AD9551, Sep. 2009, 40 pages, available at http://www.alldatasheet.com/datasheet-pdf/pdf/300879/AD/AD9551.html.
Quad/Octal Input Network Clock Generator/Synchronizer, Analog Devices, AD9548, Apr. 2009, 112 pages, available at http://www.analog.com/static/imported-files/data—sheets/AD9548.pdf.
Reynoso, Interfacing PECL to LVDS, Application Brief 30, Pericom Semiconductor Corporation, Aug. 18, 1999, 2 pages, available at www.pericom.com/pdf/applications/AB030.pdf.

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