Multiplex communications – Pathfinding or routing – Through a circuit switch
Patent
1997-12-16
2000-06-13
Patel, Ajit
Multiplex communications
Pathfinding or routing
Through a circuit switch
370362, 370366, H04Q 1100
Patent
active
06075785&
ABSTRACT:
A method and apparatus for accessing data of a telecommunications interface control RAM to meet the two different requirements of the two types of devices accessing the control RAM. Data for output ports are typically aligned such that time-slot 0 for each port leaves the network at the same time. The hardware therefore requests that the control RAM be organized such that the first N locations correspond to time-slot 0 of all output ports, the next N locations to time-slot 1 of all ports, and so on with the final N locations corresponding to the last time-slot of all ports. The software addressing under processor control, on the other hand, uses data structure groups which are a function of the communication ports. Connecting a least significant group of address lines address lines of a control bus respectively to a most significant group of address lines of the control RAM and connecting a more significant group of address lines of the control bus respectively to a least significant group of address lines of the control RAM provides linear addressing sequences of the control bus to result in every N th. control RAM location being accessed. Such addressing typically stores the first N locations correspond to all of the time-slots on port 0, the next N locations for all time-slots on port 1 and so on with the final N locations corresponding to all the time-slots of the last port. After this data storing, software addressing under processor control performs these address translation function using sequential addressing to access the control RAM and the address line connections provide a rapid and effective translation.
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Reveles Frank Manuel
Sallese Kevin Ernest
Wilde Charles Joseph
Lucent Technologies - Inc.
Patel Ajit
Penrod Jack R.
Phunkulh Bob A.
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