Static information storage and retrieval – Floating gate – Particular biasing
Patent
1997-08-26
1999-09-28
Nelms, David
Static information storage and retrieval
Floating gate
Particular biasing
36518523, 36518516, 36523004, G11C 1604
Patent
active
059598921
ABSTRACT:
The present invention provides a method and an apparatus for programming a selected call within a virtual ground EPROM array cell without disturbing adjacent array cells. The electrical disturbance of data stored in adjacent cells is limited in a number of ways: (1) a column connection circuit is provided for selectively coupling together adjacent pairs of even-odd or odd-even column lines so that source and drain terminals of adjacent memory cells are electrically coupled together, thereby preventing the data stored within the adjacent cells from being disturbed; (2) a current limiter circuit is provided for lowering a potential on a terminal of the selected cell at a controlled rate during programming so that voltages on terminals of the selected cell do not disturb data stored on adjacent memory cells; (3) the order in which programming signals are applied to terminals of the selected cell are controlled in such a way as to reduce the disturbance of data on adjacent cells; and (4) high wordline and data line voltages are applied to the selected cell in two steps, first to an intermediate voltage, and then to a high voltage. This reduces the disturbance to adjacent cells and improves programming.
REFERENCES:
patent: 3916169 (1975-10-01), Cochran et al.
patent: 3934233 (1976-01-01), Fisher et al.
patent: 4021781 (1977-05-01), Caudel
patent: 4281397 (1981-07-01), Neal et al.
patent: 4387447 (1983-06-01), Klass et al.
patent: 4460981 (1984-07-01), Van Buskirk et al.
patent: 4628487 (1986-12-01), Smayling
patent: 4635347 (1987-01-01), Lien et al.
patent: 4698900 (1987-10-01), Esquivel
patent: 4720323 (1988-01-01), Sato
patent: 4795719 (1989-01-01), Eitan
patent: 4806201 (1989-02-01), Mitchell et al.
patent: 4833514 (1989-05-01), Esquivel et al.
patent: 4849943 (1989-07-01), Pfennings
patent: 4903105 (1990-02-01), Najji
patent: 4935791 (1990-06-01), Namaki et al.
patent: 4939696 (1990-07-01), Sasaki et al.
patent: 4958326 (1990-09-01), Sakurai
patent: 4961164 (1990-10-01), Miyaoka et al.
patent: 4967399 (1990-10-01), Kuwabara et al.
patent: 4977538 (1990-12-01), Anami et al.
patent: 4992980 (1991-02-01), Park et al.
patent: 5008865 (1991-04-01), Shaffer et al.
patent: 5020026 (1991-05-01), Schreck et al.
patent: 5023837 (1991-06-01), Schreck et al.
patent: 5027321 (1991-06-01), Park
patent: 5126808 (1992-06-01), Montalvo et al.
patent: 5128895 (1992-07-01), Park
patent: 5204835 (1993-04-01), Eitan
patent: 5245570 (1993-09-01), Fazio et al.
patent: 5317535 (1994-05-01), Talreja et al.
patent: 5337274 (1994-08-01), Ohji
patent: 5359555 (1994-10-01), Salter, III
patent: 5383162 (1995-01-01), Shirai et al.
patent: 5493139 (1996-02-01), Akiyama et al.
patent: 5544099 (1996-08-01), Hara
Ai Shi-Charng
Huang Chin-Yi
Lee Chien-Sing
Lin Chin-Hsi
Ni Ful-Long
Haynes Mark A.
Macronix International Co. Ltd.
Nelms David
Nguyen Tuan T.
LandOfFree
Apparatus and method for programming virtual ground EPROM array does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for programming virtual ground EPROM array , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for programming virtual ground EPROM array will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-711177