Boots – shoes – and leggings
Patent
1996-07-09
1998-10-20
Kriess, Kevin A.
Boots, shoes, and leggings
364933, 364934, 3649341, 364DIG2, G06F 918
Patent
active
058260633
ABSTRACT:
An integrated circuit allows a user or system designer to program the length of a transaction cycle by programming the lengths of the setup time period, the command time period and the recovery time period, individually. An eight-bit register is used to store a two-bit prescaler value and a six-bit count value for each of the setup, command and recovery time periods. The value represented by the prescaler is then multiplied by the count value and the resulting value is input to a timer which counts down from the resulting value, signalling to a state machine when it has reached zero. A four-state state machine sends the command to begin each transaction cycle and each setup, command and recovery time period within each transaction cycle. The state machine is notified by the timer when the time period has elapsed for each of the three states so that it can send the signal to begin the next state. At the beginning of each command time period, the state machine also signals to the system that the command can be executed. At the beginning of each transaction cycle the state machine also sends the signal to load the next data value and address value from the first-in first-out stack onto the data and address busses, respectively.
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Richter Bryan Michael
Smith Stephen Arthur
Banankhah Majid A.
Cirrus Logic Inc.
Kriess Kevin A.
Violette J. P.
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