Apparatus and method for programming a memory array

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185230, C365S225700

Reexamination Certificate

active

11158518

ABSTRACT:
A method of programming a memory array is provided, including accessing a plurality of word lines of the memory array by providing a plurality of voltage steps sequentially after one another to the respective word lines, and accessing a plurality of bit lines of the memory array each time that a respective word line is accessed, to program a plurality of devices corresponding to individual word and bit lines that are simultaneously accessed, each device being programmed by breaking a dielectric layer of the device, accessing of the bit lines being sequenced such that only a single one of the devices is programmed at a time.

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patent: 6034882 (2000-03-01), Johnson et al.
patent: 6515344 (2003-02-01), Wollesen
patent: 6686791 (2004-02-01), Zheng et al.
patent: 7102951 (2006-09-01), Paillet et al.
patent: 2006/0140030 (2006-06-01), Bedarida et al.

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