Telecommunications – Transmitter – Amplitude modulation
Reexamination Certificate
1999-03-31
2001-06-26
Trost, William G. (Department: 2683)
Telecommunications
Transmitter
Amplitude modulation
C375S298000, C327S238000
Reexamination Certificate
active
06253066
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to signal generators and, in particular, to a signal generator that produces multiple output signals with fixed phase relationships between them.
BACKGROUND OF THE INVENTION
Signal generators that produce multiple output signals with fixed phase relationships between them are known. One such signal generator is a quadrature generator. A quadrature generator is typically utilized to apply the sine and cosine components of a carrier frequency to a pair of mixer circuits in a quadrature amplitude modulator or demodulator.
One known embodiment of a wideband, quadrature generator
100
is depicted in FIG.
1
. The quadrature generator
100
includes a clock oscillator
101
, a frequency doubler
103
, a duty cycle adjuster
105
, a duty cycle detector
107
, and a divide-by-two circuit
109
. The clock oscillator
101
produces a first clock signal
111
at a desired output carrier frequency. The frequency doubler
103
receives the first clock signal
111
and produces a second clock signal
113
at twice the frequency of the first clock signal
111
. However, the frequency doubler
103
does not typically produce a clock signal
113
having a 50—50 (i.e., 50%) duty cycle. Thus, the second clock signal
113
is applied to the duty cycle adjuster
105
which, in combination with the duty cycle detector
107
, produces a third clock signal
115
at twice the frequency of the first clock signal
111
. However, due to collective operation of the duty cycle adjuster
105
and the duty cycle detector
107
, the third clock signal
115
has an exact 50—50 duty cycle which is necessary to enable the divide-by-two circuit
109
to produce output signals
117
,
119
that are in perfect phase quadrature with one another. The divide-by-two circuit
109
then receives the third clock signal
115
and generates quadrature output signals (I)
117
and (Q)
119
.
The divide-by-two circuit
109
is depicted in more detail in FIG.
2
. The divide-by-two circuit
109
includes two flip-flops
201
,
203
configured in a master-slave arrangement and an inverter
205
. The master flip-flop
201
receives at its clock (CLK) input the third clock signal
115
and produces at its output the in-phase (I) quadrature output signal
117
. The slave flip-flop
203
receives, at its data input, the I quadrature output signal
117
and, at its clock input, an inverted representation of the third clock signal
115
. The slave flip-flop
203
then produces the Q quadrature output signal
119
, which is 90 degrees out-of-phase with respect to the I quadrature output signal
117
. The Q quadrature output signal
119
is also fed back to the data input of the master flip-flop
201
to provide the symmetry necessary to allow the two flip-flops
201
,
203
to produce output signals
117
,
119
in exact phase quadrature with each other. More detailed operation of the quadrature generator
100
and the divide-by-two circuit
109
can be found in U.S. Pat. No. 5,375,258.
Although the prior art divide-by-two circuit
109
provides output signals
117
,
119
in exact phase quadrature with each other as is optimal for a quadrature generator, the state of the divide-by-two circuit
109
when the clock signal
115
is interrupted is indeterminate. Thus, the phase relationship between the first input signal
111
and the quadrature output signals
117
,
119
is not predictable. In practicality, after a clock signal interruption, the divide-by-two circuit
109
has an equal probability of returning to operation in any one of two states. Timing diagrams
300
showing the two equally probably start-up states for the divide-by-two circuit
109
are depicted in FIG.
3
. The two equally probable start-up states of the divide-by-two circuit
109
result in quadrature output signals having varying output phases at identical clock times. As shown, the phases of the output signals in state
1
are 180 degrees out-of-phase with respect to the phases of the output signals in state
2
. Since either state is equally likely depending upon the time of the clock interruption, any quadrature generator that requires a predictable phase relationship between first input signal
111
and the quadrature output signals
117
,
119
would not be able to use the divide-by-two circuit
109
to produce the quadrature output signals
117
,
119
.
One type of quadrature generator that requires a predictable phase relationship between the first input signal
111
and the quadrature output signals
117
,
119
is a quadrature generator used in a Cartesian feedback, linear quadrature amplitude modulation (QAM) transmitter. Such a transmitter employs a first quadrature generator to produce the injection signals applied to the transmitter's forward path upconversion mixers and employs a second quadrature generator to produce the injection signals applied to the transmitter's feedback path down-conversion mixers.
To maintain their linearity, Cartesian feedback transmitters typically “train” their negative feedback loops periodically to insure a 180-degree phase shift around the loop. During each training period, the transmitter opens the feedback loop, conveys a training signal around the loop, measures the phase of the loop, and adjusts the phase of the loop as necessary to obtain the desired 180 degrees of phase shift. Consequently, to maintain the feedback loop phase at 180 degrees after return to normal transmitter operation, the phase changes introduced by the transmitter elements must be substantially the same during and immediately after the training period.
To adjust the loop phase, the phase of the clock signal applied to the down-conversion mixers is altered to achieve the desired 180-degree phase shift around the feedback loop. When training is over, the transmitter will operate normally only if the output phases of the quadrature output signals have not changed substantially since training. However, since the start-up phase of the divide-by-two circuit
109
can produce signals
117
,
119
with indeterminate absolute phases, such a circuit, if used, could cause the transmitter's feedback loop to become unstable if the start-up phases of the output signals
117
,
119
were 180 degrees out-of-phase with their expected phases. For example, if during training, the down-conversion mixers each introduced a ten degree phase change, but then, upon closing the feedback loop, the down-conversion mixer introduced a 190 degree phase change due to the state of the quadrature generator supplying the down-conversion mixers, the loop phase would now be zero degrees instead of 180 degrees, thereby resulting in positive feedback, loop instability, and possible transmitter destruction.
Therefore, a need exists for an apparatus and method for producing a plurality of output signals with fixed phase relationships therebetween that have, at all times, a single, determinate phase relationship with the input signal used to generate them. Such an apparatus and method that could be used to implement a quadrature generator in a Cartesian feedback transmitter would be an improvement over the prior art.
REFERENCES:
patent: 3626308 (1971-12-01), Paine
patent: 4878188 (1989-10-01), Ziegler, Jr.
patent: 5375258 (1994-12-01), Gillig
patent: 5410263 (1995-04-01), Waizman
patent: 5554945 (1996-09-01), Lee et al.
patent: 5808498 (1998-09-01), Donnelly et al.
patent: 5930689 (1999-07-01), Wilhite et al.
Gailus Paul H.
Wilhite Jeffrey B.
Zbotaniw Rostyslaw
Jacobs Jeffrey K.
Motorola Inc.
Smith Sheila
Trost William G.
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