Apparatus and method for processing cells in an ATM...

Details Apparatus and method for processing cells in an ATM... Apparatus and method for processing cells in an ATM...

2005-03-31

2009-11-24

Yao, Kwang B (Department: 2416)

Multiplex communications

Pathfinding or routing

Store and forward

C370S474000

Reexamination Certificate

active

07623539

ABSTRACT:
An apparatus for interfacing with a cell delay variation buffer and a re-assembly memory buffer includes a header and sequence number processing module that can interface with the cell delay variation buffer and a re-assembly processing module that can interface with the re-assembly memory buffer. The header and sequence number processing module causes payloads from the cells to be stored in annotated form in the cell delay variation buffer and then extracted. Payload information from the extracted annotated payload can be passed to the re-assembly processing module which causes it to be stored in the re-assembly memory buffer and extracted therefrom as needed. By splitting the cell delay variation and re-assembly buffer functions, less expensive commodity memory can be used for the cell delay variation buffer function.

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