Optics: measuring and testing – Inspection of flaws or impurities – Surface condition
Reexamination Certificate
2000-07-08
2004-06-08
Smith, Zandra V. (Department: 2877)
Optics: measuring and testing
Inspection of flaws or impurities
Surface condition
C356S237200, C356S237300, C356S237400
Reexamination Certificate
active
06747734
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention is directed to an apparatus and method for processing a microelectronic workpiece. More particularly, the present invention is directed to an improved apparatus and method of processing a microelectronic workpiece using a metrology result representative of a microelectronic workpiece condition. For purposes of the present application, a microelectronic workpiece is defined to include a microelectronic workpiece formed from a substrate upon which microelectronic circuits or components, data storage elements or layers, and/or micro-mechanical elements are formed.
The fabrication of microelectronic components from a microelectronic workpiece, such as a semiconductor wafer substrate, polymer or ceramic substrate, etc., involves a substantial number of operations performed on the microelectronic workpiece. Such operations include, for example, material deposition, patterning, doping, chemical mechanical polishing, electropolishing, and heat treatment.
Material deposition processing involves depositing or otherwise forming thin layers of material on the surface of the microelectronic workpiece. Patterning provides deposition or removal of selected portions of these added layers. Doping of a microelectronic workpiece such as a the semiconductor wafer, is the process of adding impurities known as “dopants” to the selected portions of the microelectronic workpiece to alter the electrical characteristics of the substrate material. Heat treatment of the microelectronic workpiece involves heating and/or cooling the microelectronic workpiece to achieve specific process results. Chemical mechanical polishing involves the removal of material through a combined chemical/mechanical process, while electropolishing involves the removal of material from a microelectronic workpiece surface using electrochemical reactions.
Production of semiconductor integrated circuits and other microelectronic devices from microelectronic workpieces, such as semiconductor wafers, typically requires the formation and/or electrochemical processing or one or more thin film layers on the microelectronic workpiece. The microelectronic manufacturing industry has applied a wide range of thin film layer materials to form such microelectronic structures. These thin film materials include metals and metal alloys such as, for example, nickel, tungsten, tantalum, solder, platinum, copper, aluminum, gold, etc., as well as dielectric materials, such as metal oxides, semiconductor oxides, and perovskite materials.
Electroplating and other electrochemical processes, such as electropolishing, electro-etching, anodization, etc., have become important in the production of semiconductor integrated circuits and other microelectronic devices from such microelectronic workpieces. For example, electroplating is often used in the formation of one or more metal layers on the microelectronic workpiece. These metal layers are typically used to electrically interconnect the various devices of the integrated circuit. Further, the structures formed from the metal layers may constitute microelectronic devices such as read/write heads, etc.
Electroplated metals typically include copper, nickel, gold, platinum, solder, nickel-iron, etc. Electroplating is generally effected by initial formation of a seed layer on the microelectronic workpiece in the form of a very thin layer of metal, whereby the surface of the microelectronic workpiece is rendered electrically conductive. This electro-conductivity permits subsequent formation of a blanket or patterned layer of the desired metal by electroplating. Subsequent processing, such as chemical mechanical planarization, may be used to remove unwanted portions of the patterned or metal blanket layer formed during electroplating, resulting in the formation of the desired metallized structure.
Electropolishing of metals at the surface of a microelectronic workpiece involves the removal of at least some of the metal using an electrochemical process. The electrochemical process is effectively the reverse of the electroplating reaction and is often carried out using the same or similar reactors as electroplating.
Anodization typically involves oxidizing a thin-film layer at the surface of the microelectronic workpiece. For example, it may be desirable to selectively oxidize certain portions of a metal layer, such as a Cu layer, to facilitate subsequent removal of the selected portions in a solution that matches the oxidized material faster than the non-oxidized material. Further, anodization may be used to deposit certain materials, such as perovskite materials, onto the surface of the microelectronic workpiece.
As the size of various microelectronic circuits and components decreases, there is a corresponding decrease in the manufacturing tolerances that must be met by the manufacturing tools. It is desirable that electrochemical processes uniformly process the surface of a given microelectronic workpiece. It is also desirable that the electrochemical process meet microelectronic workpiece-to-microelectronic workpiece uniformity requirements.
Multiple processes must be executed upon a microelectronic workpiece to manufacture the desired microelectronic circuits, devices, or components. These processes are generally executed in processing tools that are specifically designed to implement one or more of the requisite processes. In order to automate the processing and minimize operator handling, tool architectures have been developed that incorporate multiple processing stations and automated transfer of the microelectronic workpieces from one processing station to the next.
In such tools, the microelectronic workpieces are processed individually at the various processing stations. Furthermore, multiple microelectronic workpieces are concurrently processed at different processing stations. Thus, one microelectronic workpiece may be processed in one of the processing stations while another microelectronic workpiece is concurrently processed in another one of the processing stations. In this way, a pipeline processing approach can be developed, which enhances production throughput. Additionally, processing steps that take longer to perform may have multiple processing stations devoted to performing that particular processing step, thereby enhancing production throughput.
Numerous processing tools have been developed to implement the foregoing processing operations. These tools take on different configurations depending on the type of microelectronic workpiece used in the fabrication process and the process or processes executed by the tool. An exemplary tool embodiment is disclosed in U.S. patent application Ser. No. 08/991,062, filed Dec. 15, 1997, entitled “Semiconductor Processing Apparatus Having Lift and Tilt Mechanism.”
One tool configuration, known as the LT-210C™ processing tool and available from Semitool, Inc., of Kalispell, Mont., includes a plurality of microelectronic workpiece processing stations such as one or more rinsing/drying stations, one or more wet processing stations, and one or more thermal processing stations that includes a rapid thermal processing (“RTP”) reactor. Such wet processing operations include electroplating, etching, cleaning, electroless deposition, electropolishing, etc..
In the processing of microelectronic workpieces, the output of one process is the input for the next process, and such output typically influences the output of the next process. This is true, for instance, in the case of a copper damascene interconnect process, with the barrier/seed layer process output influencing the output of the copper electrochemical deposition (“ECD”) process, or the output of the copper ECD process influences the output of the copper chemical mechanical polishing (“CMP”) process. This is also the case in most thin film ECD processes, where the thickness and the thickness uniformity of the seed layer affect the thickness uniformity of the plated film.
The present inventors have recognized the desirability of, in a process having a seque
Eudy Steve L.
McHugh Paul R.
Ritzdorf Thomas L.
Wilson Gregory J.
Perkins Coie LLP
Semitool Inc.
Smith Zandra V.
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