Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2011-07-12
2011-07-12
Nguyen, Khai M (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S155000, C341S162000, C341S172000
Reexamination Certificate
active
07978116
ABSTRACT:
Apparatus and methods for pipelined analog-to-digital conversion are disclosed. In some embodiments, a pipeline analog-to-digital converter includes a plurality of multiplying digital-to-analog converter (MDAC) stages coupled in cascade. At least one of the MDAC stages includes two or more flash ADCs connected in parallel, operating alternately to generate digital signals from an analog input voltage. In one embodiment, the flash ADCs provide the digital signals in an alternating manner to a capacitor block that receives a delayed analog input voltage. In another embodiment, the at least one MDAC may include two or more capacitor blocks, each of which is associated with a respective one of the flash ADCs, forming two or more sets of a flash ADC and a capacitor block. In yet another embodiment, the at least one MDAC also include three or more capacitor blocks, each of which can be randomly selected for one of the flash ADCs.
REFERENCES:
patent: 4779059 (1988-10-01), Taki et al.
patent: 5635937 (1997-06-01), Lim et al.
patent: 6259392 (2001-07-01), Choi et al.
patent: 6366230 (2002-04-01), Zhang et al.
patent: 6756929 (2004-06-01), Ali
patent: 6822601 (2004-11-01), Liu et al.
patent: 6861969 (2005-03-01), Ali
patent: 6876318 (2005-04-01), Mulder et al.
patent: 7106106 (2006-09-01), Hughes
patent: 7265703 (2007-09-01), Sasaki et al.
patent: 7397409 (2008-07-01), Jeon et al.
patent: 7456775 (2008-11-01), Chen
patent: 7551115 (2009-06-01), Bailey et al.
patent: 7561095 (2009-07-01), Sasaki et al.
patent: 7570082 (2009-08-01), Gebara et al.
patent: 7646324 (2010-01-01), Matsubayashi
patent: 2009/0153196 (2009-06-01), Gebara et al.
Taherzadeh-Sani et al., “Digital Background Calibration of Capacitor-Mismatch Errors in Pipelined ADCs,” IEEE Transactions on Circuits and Systems—II: Express Briefs, vol. 53, No. 9, pp. 966-970, Sep. 2006.
Maxim, Understanding Pipelined ADC's, available at http://www.maxim-ic.com/appnotes.cfm/appnote—number/1023/, pp. 1-6, Oct. 2, 2001.
Office Action dated Nov. 10, 2010 in U.S. Appl. No. 12/578,076, filed Oct. 13, 2009.
Bardsley Scott G.
Derounian Peter R.
Murden Franklin
Analog Devices Inc.
Knobbe Martens Olson & Bear LLP
Nguyen Khai M
LandOfFree
Apparatus and method for pipelined analog to digital conversion does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for pipelined analog to digital conversion, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for pipelined analog to digital conversion will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2634549