Apparatus and method for performing impedance synthesis in a...

Details Apparatus and method for performing impedance synthesis in a... Apparatus and method for performing impedance synthesis in a...

2004-09-29

2009-02-03

Elahee, Md S (Department: 2614)

Telephonic communications

Line equalization or impedance matching

Reexamination Certificate

active

07486786

ABSTRACT:
A method includes generating an output signal at a transmitter using an input signal. The method also includes providing the output signal for communication over a communication link. The method further includes identifying a return signal by at least partially removing from the output signal at least one of: the communicated signal and base line wander. In addition, the method includes establishing a synthesized impedance to the return signal.

REFERENCES:
patent: 4782507 (1988-11-01), Siligoni et al.
patent: 6137356 (2000-10-01), Sakuragi
patent: 6906426 (2005-06-01), Sefidvash
patent: 6970515 (2005-11-01), Bicakci et al.
patent: 7190194 (2007-03-01), Nagahori et al.
patent: 7194037 (2007-03-01), Sutardja
patent: 2001/0016021 (2001-08-01), Chan
patent: 2004/0053579 (2004-03-01), Ferianz

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