Apparatus and method for performing both 24 bit and 16 bit arith

Details Apparatus and method for performing both 24 bit and 16 bit arith Apparatus and method for performing both 24 bit and 16 bit arith

1994-12-22

1997-01-28

Mai, Tan V.

Boots, shoes, and leggings

G06F 738

Patent

active

055983626

ABSTRACT:
A data ALU (arithmetic logic unit) (54) in a data processing system (20) performs both 24-bit arithmetic, and 16-bit exact arithmetic (including shifting and logical operations) using the same hardware. For a multiply/accumulate operation in 16-bit exact mode, shifting operations are used to align the operands so that 16-bit exact mode is transparent to a user. An entire instruction set can be executed in 24-bit mode or 16-bit exact mode. The same instructions and hardware are used in both modes. A transition between modes is performed by changing a status bit (97) in a status register (95).

REFERENCES:
patent: 4575812 (1986-03-01), Kloker et al.
patent: 4843585 (1989-06-01), Williams
Motorola Inc., "DSP56000 Digital Signal Processor Family Manual", 1992, pp. 3-1 through 3-19.

Affiliated with

Also associated with

Rating

Apparatus and method for performing both 24 bit and 16 bit arith does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus and method for performing both 24 bit and 16 bit arith, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for performing both 24 bit and 16 bit arith will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-945533