Apparatus and method for performing blit operations across...

Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors

Reexamination Certificate

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Details

C345S530000, C345S543000, C711S168000

Reexamination Certificate

active

08059128

ABSTRACT:
A method of performing a blit operation in a parallel processing system includes dividing a blit operation into batches of pixels, performing reads of pixels associated with a first batch in any order, confirming that all reads of pixels associated with the first batch are completed, and performing writes of pixels associated with the first batch in any order. The pixels of the first batch and pixels of additional batches are applied to parallel processors, where the parallel processors include a corral defined by entry points and exit points distributed across the parallel processors.

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patent: 2003/0197707 (2003-10-01), Dawson

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