Boots – shoes – and leggings
Patent
1994-11-18
1998-04-07
Teska, Kevin J.
Boots, shoes, and leggings
395527, 395495, 364578, 364488, 364238, 364DIG1, 371 223, G06F 1200
Patent
active
057375780
ABSTRACT:
Apparatus and method for emulating a circuit having at least one multiport RAM that requires at least two programmable device to be emulated. The multiport RAM has an array of storage elements, a read multiplexer, and a write multiplexer and is partitioned into a number of slices, each of which is capable of being programmed into one of an array of programmable devices. In one embodiment, each slice is another multiport RAM having the same depth, number of read ports, and number of write ports as the multiport RAM being emulated, but having a narrower width than the multiport RAM being emulated. In another embodiment, the multiport RAM is partitioned into read slices and write slices, which will typically be of different widths. The read slices comprise the read multiplexers. The write slices comprise the array of storage elements and the write multiplexers.
REFERENCES:
patent: 4463421 (1984-07-01), Laws
patent: 4503386 (1985-03-01), DasGupta et al.
patent: 4697241 (1987-09-01), Lavi
patent: 4740894 (1988-04-01), Lyon
patent: 4766535 (1988-08-01), Aueibach et al.
patent: 4789924 (1988-12-01), Fukuta
patent: 4845677 (1989-07-01), Chappell et al.
patent: 4849928 (1989-07-01), Hauck
patent: 4872125 (1989-10-01), Catlin
patent: 4967340 (1990-10-01), Dawes
patent: 5036473 (1991-07-01), Butts et al.
patent: 5109353 (1992-04-01), Sample et al.
patent: 5204841 (1993-04-01), Chappel et al.
patent: 5309045 (1994-05-01), Saeki et al.
patent: 5325512 (1994-06-01), Takahashi
patent: 5327361 (1994-07-01), Long et al.
patent: 5329470 (1994-07-01), Sample et al.
patent: 5329471 (1994-07-01), Swoboda et al.
patent: 5375225 (1994-12-01), Dean et al.
Pearce et al., "Multi-Level Logic Synthesis for Concurrent Login CLi6000 Devices," IEEE, pp. 1-4.
Quenot et al., "A Reconfigurable Compute Engine for Real Time Vision Automata Prototyping," IEEE, 1994, pp. 91-100.
Suganuma et al., "Reconfigurable Machine and its Application to Logic Diagnosis", IEEE, 1992, pp. 373-376.
Butts et al., "An Efficient Logic Emulation System," IEEE, 1992, pp. 138-141.
Varghese et al., "An Efficient Logic Emulation System," IEEE, 1993, pp. 171-174.
Brian Box, "Fidd Programmable Gate Array Based Reconfigurable Processor," IEEE, 1994, pp. 40-48.
Hennenhoefer Eric Todd
Raymond Jonathan Henry
International Business Machines Corp.
Moorhead, Esq. Sean T.
Phan Thai
Shkurko, Esq. Eugene
Teska Kevin J.
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