Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Including passive device
Reexamination Certificate
2007-07-31
2007-07-31
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Including passive device
C438S329000, C438S384000, C438S382000, C438S210000, C257S528000, C257S536000, C257S581000
Reexamination Certificate
active
10986739
ABSTRACT:
A method and apparatus for packaging semiconductor devices using patterned laminate films to reduce stress buffering. The method includes fabricating a semiconductor die having thin film resistors and bond pads formed on an active surface. A film layer is formed onto the active surface of the die, covering the thin film resistors and bond pads. The film layer is then patterned to create recesses in the film layer in the vicinity of the bond pads on the active surface of the die. The die then undergoes wire bonding and is next encapsulated in a molding compound. The film layer between the film resister and the molding compound reduces stress buffering created by the molding compound.
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Pending U.S. Appl. No. 10/953,002, Low Stress Packaging Methods For Semiconductor Devices, filed Sep. 28, 2004 (Copy not included per Waiver of 37 CFR 1.98).
Divakaran Pradeep A/L P.
Hanifah Zabarulla
Heng Lim Leong
Inn Low Chian
National Semiconductor Corporation
Thai Luan
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