Apparatus and method for optimizing the performance of x87...

Details Apparatus and method for optimizing the performance of x87... Apparatus and method for optimizing the performance of x87...

2008-04-10

2011-10-25

Malzahn, David H (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

08046400

ABSTRACT:
A microprocessor having a Precision Control (PC) field, an instruction dispatcher, and a Floating Point unit (FPU). The FPU receives an FP Add instruction from the instruction dispatcher, and generates a sum from its addends. The FPU determines whether any conditions exist in the addends with respect to their contribution to a rounding determination and relative to the PC field. If none of the conditions exists, the FPU makes the rounding determination based on the smaller addend and the PC field, and selectively rounds the sum based on the rounding determination. If any conditions exist, the FPU saves the sum and rounding information derived from the addends, and signals the instruction dispatcher to re-dispatch the instruction. On re-dispatch, the FPU makes the rounding determination based on the saved rounding information and the PC field, and selectively rounds the sum based on the rounding determination.

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Seidel et al. “On the Design of Fast IEEE Floating-Point Adders.” Proceedings of the 15thIEEE Symposium on Computer Arithmetic (ARITH'01). 2001.

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