Apparatus and method for optimizing the efficiency of a...

Batteries: thermoelectric and photoelectric – Photoelectric – Cells

Reexamination Certificate

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C136S249000, C136S262000, C136S252000, C136S293000, C257S449000, C257S453000, C257S464000, C257S431000

Reexamination Certificate

active

06680432

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to solar cells and methods for their fabrication, and more particularly to optimizing the efficiency of a bypass diode within solar cells.
DESCRIPTION OF THE RELATED ART
Photovoltaic cells, also called solar cells, are one of the most important new energy sources that have become available in the past several years. Considerable effort has gone into solar cell development. As a result, solar cells are currently being used in a number of commercial and consumer-oriented applications. While significant progress has been made in this area, the requirement for solar cells to meet the needs of more sophisticated applications has not kept pace with demand. Applications such as satellites used in mobile and telephone communications have dramatically increased the demand for solar cells with improved power and energy conversion characteristics.
In satellite and other space related applications, the size, mass, and cost of a satellite power system is dependent on the power and energy conversion efficiency of the solar cells used. Putting it another way, the size of the payload and the availability of on-board services are proportional to the amount of power provided. Thus, as the payloads become more sophisticated, solar cells, which act as the power conversion devices for the on-board power systems, become increasingly more important.
Solar cells are often used in arrays, an assembly of solar cells connected together in a series. The shape and structure of an array, as well as the number of cells it contains, are determined in part by the desired output voltage and current.
When all of the solar cells in an array are receiving sunlight or are illuminated, each cell will be forward biased. However, if any of the cells are not illuminated, because of shadowing or damage, those cells may become reversed biased in order to carry the current generated by the illuminated cells. This reverse biasing can degrade the cells and can ultimately render the cells inoperable. In order to prevent reverse biasing, a diode structure is often implemented.
The purpose of the bypass diode is to draw the current away from the shadowed or damaged cell. The current flows through the bypass diode and it becomes forward biased when the shadowed cell becomes reverse biased. Rather than forcing current through the shadowed cell, the diode draws the current away from the shadowed cell and maintains the connection to the next cell.
Different types of bypass diodes have been utilized in prior art. In some configurations the bypass diode is connected to the exterior of a solar cell array. This is a difficult device to manufacture, and charges the array assembler with a task perhaps better performed by the cell manufacturer. Another conventional method to provide bypass diode protection to a solar cell array has been to connect a bypass diode between adjacent cells, with the anode of the bypass diode connected to one cell and the cathode of the diode connected to an adjoining cell. However, this technique is complicated to manufacture and requires a very difficult and inefficient assembly method. Another technique for providing a bypass diode for each cell involves a recess formed onto the back of each cell and a bypassed diode being placed into this recess. This technique has not yet proven efficient to manufacture because of the delicacy of the cells and because the technique requires the connection of the adjoining cells to be formed by the assembler of the array as opposed to the cell manufacturer.
Given the foregoing, there is a necessity for an integral bypass diode which can be manufactured by the cell manufacturer as an integral part of the cell itself, taking the responsibility for the bypass away from the array assembler. Rather than working with an array assembler to develop the most efficient means of including a bypass diode as part of the array, the device demonstrated by this invention allows the cell manufacturers to simply give the array assemblers an all-in-one cell that can be tightly packed and arrayed without the necessity of adding an additional bypass diode device to the array.
U.S. Pat. No. 6,278,054 (the “'054 patent”) describes an integral bypass diode that attempts to address these drawbacks. However, the '054 patent requires additional epitaxial layers to be grown on top of the multijunction cell structure, and the bypass diode described in the '054 patent is for a homojunction made out of GaAs. Most of this additional epitaxial layer has to be etched off the front of the cell, leaving only a small area to be used as the bypass diode.
European Patent no. 1 056 137 A1, Application Serial No. 00109681.7 discloses a Schottky diode for a two junction or single junction device, in contrast to the device described herein.
SUMMARY OF THE INVENTION
A preferred embodiment of the present invention provides a method for manufacturing a bypass diode in a multijunction solar cell with at least three junctions.
In accordance with the purpose of the invention, as embodied and broadly described herein, the invention relates to an alternative and more effective way of optimizing the efficiency of and manufacturing a bypass diode so as to create a monolithic integral bypass diode that can be manufactured with a high rate of efficiency and when operable will require less voltage than prior art devices.
Advantages of the invention will be set forth, in part, in the description that follows and, in part, will be understood by those skilled in the art from the description herein.


REFERENCES:
patent: 4598164 (1986-07-01), Tiedje et al.
patent: 4759803 (1988-07-01), Cohen
patent: 5009720 (1991-04-01), Hokuyo et al.
patent: 5138403 (1992-08-01), Spitzer
patent: 6103970 (2000-08-01), Kilmer et al.
patent: 6278054 (2001-08-01), Ho et al.
patent: 6300558 (2001-10-01), Takamoto et al.
patent: 6316716 (2001-11-01), Hilgrath
patent: 6359210 (2002-03-01), Ho et al.
patent: 2002/0040727 (2002-04-01), Stan et al.
patent: 2002/0164834 (2002-11-01), Boutros et al.
patent: 1056137 (2000-11-01), None
patent: 2346010 (2000-07-01), None
patent: 9-64397 (1997-03-01), None

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