Coded data generation or conversion – Digital code to digital code converters – Serial to parallel
Reexamination Certificate
1998-05-08
2002-10-01
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Serial to parallel
C341S101000
Reexamination Certificate
active
06459393
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
This invention generally relates to computer systems and more specifically relates to transmitting digital data from one location to another.
2. Background Art
The development of the EDVAC computer system of 1948 is often cited as the beginning of the computer era. Since that time, computer systems have evolved into extremely sophisticated devices, and computer systems may be found in many different settings. Computer systems typically include a combination of hardware (e.g., semiconductors, circuit boards, etc.) and software (e.g., computer programs). As advances in semiconductor processing and computer architecture push the performance of the computer hardware higher, more sophisticated computer software has evolved to take advantage of the higher performance of the hardware, resulting in computer systems today that are much more powerful than just a few years ago.
Computer systems typically include operating system software that controls the basic function of the computer, and one or more software application programs that run under the control of the operating system to perform desired tasks. For example, a typical IBM Personal Computer may run the OS/2 operating system, and under the control of the OS/2 operating system, a user may execute an application program, such as a word processing program. One of the fastest growing uses of computer systems is the field of computer communications and the related use of computer networks to transmit information from one place to another. Given recent advances in network communications such as the World Wide Web and the increased emphasis on connectivity provided by Network Computers (NCs), the amount of data being transmitted from computer system to computer system is increasing rapidly. In concert with the increased reliance on computer communications, the efficient and accurate transmission of data is becoming increasingly important. This trend will only accelerate and reliable data transmission will become more critical in the future as the use of computers and computer networks continues to expand.
Within a given computer system, data is usually transported in a parallel format along a digital data path that is “N” bits wide to accommodate a discrete piece of information or data termed a “byte” or a “word.” In most computer systems, N is typically an integer multiple of eight. The parallel format of the data allows multiple data bits to be transmitted simultaneously over the internal data path of the computer, thereby increasing the speed with which information is transferred from one place to another. While the parallel transmission of data is useful for the short data paths that exist within most computer systems, transmitting data in a parallel format over significant distances is not practical due to the increased cost and difficulty of implementing parallel data paths over a long distance.
Therefore, in most cases, the transmission of digital data over longer distances is accomplished by sending the data in a high-speed serial format (i.e., one single bit after another) over a communication link designed to handle computer communications. In this fashion, data can be transferred from one computer system to another, even if the computer systems are geographically remote. For example, most telephone companies use high-speed serial transmission lines for backbones in telephone networks. Many other organizations, companies, and universities have also adopted similar standards and communicate between disparate locations over serial communication links.
In order for high-speed serial transmission to occur, the digital data signal from inside the computer must be transformed from the parallel format into a serial format prior to transmission of the data over the serial communication link. This transformation is generally accomplished by processing the computer's internal data signal through a piece of computer equipment known as a “serializer.” The function of the serializer is to receive a parallel data stream as input and, by manipulating the parallel data stream, output a serial form of the data capable of high-speed transmission over a suitable communication link. Once the serialized data has arrived at the desired destination, a piece of computer equipment known as a “deserializer” is employed to convert the incoming data from the serial format to a parallel format for use within the destination computer system.
While the general process for transmission of digital data via high-speed communication links is well known, there are several significant limitations associated with the existing methods. One of the most significant problem associated with transmitting high speed serial data signals occurs on the receiving end. When the high speed serial signal is received at the desired destination, it must be transformed from a serial signal back into a parallel signal for use within the destination computer system. Existing deserialization devices receive the incoming high-speed data signal and perform the initial processing of the data signal at the same frequency as originally transmitted. This means that the receiving computer must be able to extract the data from the high-speed serial signal at a rate commensurate with the frequency of the incoming data signal. As the frequency of the incoming data signal increases, this becomes increasingly difficult to accomplish because most presently used receiving equipment simply cannot reliably process the data and transform it beyond certain frequency thresholds.
While it is desirable and theoretically possible to further increase the speed of transmission for serial data signals beyond the currently employed levels, existing deserialization equipment cannot reliably extract the information and reformat the data signal into parallel form at higher frequencies. The theoretical limits of high-speed data communications have not yet been reached due to the physical and logical constraints in the commonly used components of presently known devices. The intricate timing and coordination requirements necessary to process increased frequency high-speed data signals is beyond most currently available solutions. In addition, the design and use of next-generation high-speed components that can efficiently and effectively process high-speed serialized data signals is very expensive. This limits any possible solutions using these high-speed components to a fairly narrow range of applications where cost is not a significant factor.
As computer communication becomes increasingly widespread, it will become even more critical to develop better equipment for transmitting high-speed serial data signals from one location to another. Without providing improved equipment and techniques for high-speed computer communications, information transfers over computer networks will continue to be less than optimal. The practical constraints of the present equipment and methods will, therefore, remain a limiting factor and will continue to slow the growth and beneficial use of computer transmitted data, particularly at the more desirable high speeds.
DISCLOSURE OF INVENTION
According to the preferred embodiments of the present invention, an apparatus and method for improving the communication capabilities of computer systems is disclosed. The serializer and deserializer of the present invention each utilize a pair of related clock signals to allow the operation of a self-synchronizing device. No external synchronization signal is necessary for the operation of the serializer or deserializer. The most preferred embodiments of the present invention use a series of data buffers and data registers to process an incoming high speed data signal. By using the buffers and registers, the incoming signal can be reformatted and manipulated at a much lower frequency than the original transmission frequency. The deserializer of the present invention also samples a greater portion of the incoming data signal than usual to further increase reliability by reducing circuit comple
Jean-Pierre Peguy
Williams Robert R.
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