Apparatus and method for nullifying delayed slot instructions in

Details Apparatus and method for nullifying delayed slot instructions in Apparatus and method for nullifying delayed slot instructions in

1988-03-21

1991-09-24

Shaw, Gareth D.

Boots, shoes, and leggings

3642318, 3642613, 3642628, 3642656, G06F 938, G06F 930

Patent

active

050518968

ABSTRACT:
In a computing system which has memory and an instruction pipeline, a method and apparatus allows for nullification of a second instruction responsive to the state of a nullification field in a first instruction executed prior to the second instruction. After the first instruction is fetched, the operation specified by the first instruction is performed and the results of the operation are stored, including the state of the nullification field. The second instruction is fetched and the operation specified by the second operation is performed. However, conditional upon the state of the nullification field of the first instruction, results, errors, traps and interrupts of the second instruction are not stored in the computer system.

REFERENCES:
patent: 4210960 (1980-07-01), Borgerson et al.
patent: 4514804 (1985-04-01), Kimoto
patent: 4742454 (1988-03-01), Robinson et al.
patent: 4760519 (1988-07-01), Papworth et al.
patent: 4831515 (1989-05-01), Kamada et al.
patent: 4847753 (1989-07-01), Matsuo et al.

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