Patent
1995-12-22
1999-01-05
Bowler, Alyssa H.
395821, 395841, G06F 1300
Patent
active
058571175
ABSTRACT:
A transceiver as provided for effectively multiplexing IDE address and data lines with selected ISA address and data lines. Compatibility among the IDE data transfers and ISA functions are achieved by multiplexing the ISA lines that do not involve the ISA refresh of the ISA expanded memory. The transceiver includes an enable input that, when disabled, effectively isolates the IDE data lines from the ISA bus so that IDE data transfers can occur. When the enable input is active, the ISA lines not related to refresh are connected to the IDE data lines so that ISA operations can occur. Furthermore, a directional input is included in the transceiver for allowing a central processing unit to control the ISA when the directional input is active and for allowing a PCI/ISA bridge between the PCI bus and the ISA bus to control the ISA operations included the multiplexing. The result is a rearrangement of the IDE data lines with the ISA bus to eliminate a multitude of pins and connectors.
REFERENCES:
patent: 5295247 (1994-03-01), Chang et al.
patent: 5590375 (1996-12-01), Sangveraphunsiri et al.
patent: 5603050 (1997-02-01), Wolford et al.
patent: 5678064 (1997-10-01), Kulik et al.
Abramson Darren
Bennett Joe A.
Bowler Alyssa H.
Davis Jr. Walter D.
Intel Corporation
LandOfFree
Apparatus and method for multiplexing integrated device electron does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Apparatus and method for multiplexing integrated device electron, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus and method for multiplexing integrated device electron will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-869053