Coded data generation or conversion – Converter calibration or testing
Patent
1997-10-14
1999-01-19
Young, Brian
Coded data generation or conversion
Converter calibration or testing
341161, H03M 110
Patent
active
058618287
ABSTRACT:
A method and circuit for performing a monotonic digital calibration of a pipeline analog-to-digital (A/D) converter calibrates each stage of the pipeline A/D converter while using the actual input A/D converter of the stage then being calibrated. The digital output from the stage is converted to an analog signal (e.g., integrated) and fed back for use as the analog input to the stage. This ensures that the digital output from the stage has a symmetrical waveform and that the analog input voltage to the stage remains at the input threshold level. The remaining downstream pipeline A/D converter stages are then used to measure the levels of the binary residue voltage corresponding to the two states of the binary stage output so that appropriate calibration data can be generated and stored for use in calibrating that stage. By repeating this process for each successive upstream pipeline A/D converter stage the entire pipeline A/D converter can be calibrated to help ensure the monotonicity of its A/D conversion.
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patent: 5361067 (1994-11-01), Pinckley
Seung-Hoon Lee and Bang-Sup Song, "Digital-Domain Calibration of Multistep Analog-to-Digital Converters", IEEE Journal of Solid-State Circuits, vol. 27, No. 12, Dec. 1992, pp. 1679-1688.
Eric G. Soenen and Randall L. Geiger, "An Architecture and An Algorithm for Fully Digital Correction of Monolithic Pipelined ADC's", IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 42, No. 3, Mar. 1995, pp. 143-153.
Andrew N. Karanicolas, Hae-Seung Lee and Kantilal L. Bacrania, "A 15-b 1-Msample/s Digitally Self-Calibrated Pipelined ADC", IEEE Journal of Solid-State Circuits, vol. 28, No. 12, Dec. 1993, pp. 1207-1215.
National Semiconductor Corporation
Young Brian
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