Electricity: motive power systems – Automatic and/or with time-delay means – Speed or rate-of-movement
Reexamination Certificate
2000-07-19
2002-06-04
Ro, Bentsu (Department: 2837)
Electricity: motive power systems
Automatic and/or with time-delay means
Speed or rate-of-movement
C318S268000, C318S464000, C388S912000, C324S166000
Reexamination Certificate
active
06400113
ABSTRACT:
BACKGROUND INFORMATION
1. Field of Invention
This invention relates to a method for monitoring the operation of one or more cooling fans within a computing system, and, more particularly, to a method for continuously monitoring the operation of a number of fans within the system, with a minimum increase in hardware requirements and with a minimum impact on processor operation.
2. Description of the Related Art
Computing systems typically use one or more fans to provide cooling for critical components producing heat during system operation. The failure of such a fan may result in serious damage to computer hardware, along with a loss of data, due to overheating of the component. Many fans manufactured for use in cooling electronic equipment include an internal tachometer which provides one or more pulses during each revolution of the fan. These tachometer pulses can be used to determine the operating speed of the fan, and, in accordance with their absence, the fact that the fan is not turning.
The patent literature describes a number of methods for determining when a cooling fan within a computing system has failed by stopping or by running at too low a speed. For example, U.S. Pat. No. 5,727,928 describes a fan speed monitoring system for interfacing a fan, including a fan drive and sensing circuit for maintaining the voltage of the fan's Thermal Fan Speed Control (TFSC) pin above a minimum voltage level to maintain continuous power to the fan. The signal driving the TFSC pin controls the width of pulses driving a Pulse Width Modulated (PWM) fan. The fan drive and sensing circuit preferably includes an isolation resistor so that fan pulses exerted by the tachometer within the fan unit are superimposed on the TFSC pin. In the preferred embodiment, a control circuit activates the fan drive and sensing circuit and receives the filtered pulse signals for determining a time value indicative of the speed of the fan.
U.S. Pat. No. 5,534,854 describes a detection and alarm circuit for protecting electronic components cooled by an electronically commutated direct current fan motor, which produces current pulses at various rotational positions during operation. The frequency of these current pulses is used to determine the speed of rotation of the fan. Within the detection and alarm circuit, a current sensing resistor produces a pulse that is amplified and introduced to a frequency-to-voltage convertor for generating a filtered and processed voltage level for application to a voltage comparator. A reference voltage circuit supplies a voltage level to the comparator for matching with the filtered and process voltage level, and, depending on the mismatch, an output signal is introduced to a transistor switch for operating an alarm device.
U.S. Pat. No. 5,790,430 describes a variable speed fan failure detector for detecting the failure of a motor to maintain a commanded speed, which varies as a function of temperature. The failure detector develops a first voltage proportional to motor speed, senses a temperature at a point where a predetermined temperature is to be maintained, and develops a second voltage proportional to a desired speed based on the sensed temperature. The failure detector compares the first and second voltages and provides an alarm output if the first voltage drops below the second voltage.
U.S. Pat. No. 5,610,594 describes a counter to which a frequency to be monitored is taken for the continuous measurement of the cycle time of the frequency. The counter is so set that, when this frequency drops, it reaches a certain condition and issues error signals (flags) as long as the condition lasts. The first flag actuates a flip-flop which in turn actuates a timer (alarm counter) which, after a short time, triggers an alarm unless it has previously been stopped by the resetting of the flip-flop. This apparatus can be used to monitor the speed of a fan, when a speed reduction from normal operating conditions for a short time is not normally harmful, but when such a reduction in speed for a longer time indicates that an alarm signal should be issued to indicate that the fan should be replaced.
While the patents described above provide for reliable detection of a fan failure, what is needed is a method for detecting such a failure in any of a number of fans in a computing system, with a minimum amount of hardware associated with each such fan.
Conventional computing systems now include a System Management Bus (SMBUS), which is used to transmit data between a system controller, particularly a “Northbridge” chip, and Dual In-line Memory Modules (DIMMs). The System Management Bus is also called the I
2
C (Inter-Integrated Circuit) Bus. This bus has been developed because there are many different types of memory modules which can fit within the same DIMM sockets. The system controller sends a command along the System. Management Bus to the DIMMs, and the DIMMs, provided they are equipped with Serial Presence Detect circuitry, respond with information describing the capacity of each DIMM, its technology, and the fastest speed at which it can be safely clocked. The System Management Bus is also used with other resources, such as a laptop computer battery having circuits for providing information used to determined the expected life of the battery as it is being operated without recharging.
The problem of detecting and acting upon a number of different failure mechanisms within a computing system is discussed in U.S. Pat. No. 5,864,653, which describes the use of a system management module (SMM) for a host server system. The SMM includes a system management processor (SMP) connected to a system management local bus, which in turn connects to the system PCI bus through a system management central (SMC). The SMC includes logic to monitor PCI cycles and to issue error signals in the event of a system error. The SMC also isolates failed components by making request, grant, and interrupt lines for the failed device. Further, if a spare component is provided, the SMC permits dynamic switching to the spare.
What is needed is a method for coupling the detection of a failure among a number of cooling fans in a computing system together with other system management data for use by a controller within the computing system.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention, apparatus is provided for monitoring operation of a fan within a computing system. The apparatus includes a tachometer, a signal generator, sampling means, counting means, and comparison means. The tachometer includes a rotor turning with the fan to produce a tachometer output signal including a train of pulses, with a frequency of the pulses within the train of pulses being proportional to a rotational speed of the fan. The signal generator generates a square-wave signal in response to the tachometer output signal, with the square-wave signal being alternately at a high level or at a low level between sequentially adjacent transitions. The sampling means is for periodically sampling levels of the square wave signal. The counting means is for counting transitions in levels of the square wave signals during a predetermined time period by examining levels of samples taken by the sampling means. The comparison means is for comparing numbers of transitions determined by the counting means with a predetermined acceptable value.
The sampling and counting means are preferably embodied within a processor, including an input port through which the square-wave signal is delivered, executing a program for determining if a frequency of pulses in the square wave signal is within a predetermined range, wherein the program includes a first subroutine for periodically sampling the square wave signal and for counting transitions in levels of the square-wave signal within a predetermined time period by examining levels of samples taken by the sampling means and a second subroutine for comparing a number of the transitions with a predetermined value for the number of the transitions.
The present invention is readily ap
Garcia Ray
Hamel Will E.
Honeycutt Kendall A.
Still Stephen E.
Davidge Ronald V.
Ro Bentsu
Tomlin Richard A.
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