Apparatus and method for measuring pattern alignment error

Optics: measuring and testing – By alignment in lateral direction – With registration indicia

Reexamination Certificate

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Details

C356S399000, C438S401000, C250S491100, C033S645000

Reexamination Certificate

active

06600561

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to apparatus and methods for measuring alignment errors of circuit patterns and the like formed overlappingly on the surface of a semiconductor substrate (e.g., semiconductor wafer). Particularly, the present invention relates to an improved pattern-alignment-error measuring apparatus and method which measure, as the pattern-alignment-error, a positional deviation between first and second alignment reference marks that are formed in predetermined positional relation to each other as patterns are formed overlappingly on a semiconductor substrate. The basic principles of the present invention are applicable not only to pattern formation on semiconductor substrates, but also to pattern formation on glass substrates for liquid crystal displays and plasma displays and other types of substrates.
In manufacture of high-quality and high-performance semiconductor devices (such as Very-Large-Scale Integrated or VLSI circuits), a photomask (reticle) is used in a photoexposure step to sequentially print predetermined circuit patterns onto a semiconductor wafer. In such a case, there is a possibility of a positional deviation, i.e. alignment error, occurring between the last printed circuit pattern and the current printed circuit pattern. Thus, in order to measure the alignment error between the circuit patterns, a first alignment reference mark of a predetermined symmetrical shape (e.g., square shape) is formed as an etching mark at a predetermined position of the wafer surface during a process of forming of the first circuit pattern layer, and then a second alignment reference mark of a predetermined symmetrical shape (e.g., square frame shape with a predetermined line width) is printed around the first alignment reference mark simultaneously with printing of the next circuit pattern layer. After development of the wafer, the second alignment reference mark is left as a photoresist mark, and thus a positional deviation between the respective symmetrical centers of the first and second alignment reference marks on the developed wafer is measured, as an alignment error of the overlappingly-formed circuit patterns, using a pattern-alignment-error measuring apparatus.
With the conventional patter-alignment-error measuring apparatus arranged to measure, as an alignment error of the overlappingly-formed circuit patterns, a positional deviation between the symmetry centers of the first and second alignment reference marks on the developed wafer, the positional deviation between the symmetry centers of the first and second alignment reference marks can be measured appropriately as the circuit pattern alignment error without any problem, as long as the first and second alignment reference marks are formed exactly into predetermined dimensions (e.g., a mark width between opposite sides in the case of the first alignment reference mark, and a line width in the case of the second alignment reference mark). However, in case the first and second alignment reference marks are not formed exactly to the predetermined dimensions, then the symmetrical centers of the alignment reference marks would deviate from those of the accurately-sized alignment reference marks. As a consequence, the reliability of the alignment reference marks would be impaired, and hence the reliability of the circuit-pattern-alignment-error measurement would be impaired.
SUMMARY OF THE INVENTION
In view of the foregoing, it is an object of the present invention to provide a pattern-alignment-error measuring apparatus and method which achieve enhanced reliability of pattern-alignment-error measurement by determining a dimension of a first or second alignment reference mark.
In order to accomplish the above-mentioned object, the present invention provides an apparatus for measuring an error of alignment between a first pattern and a second pattern overlappingly formed on a same substrate, a first alignment reference mark of a predetermined symmetric shape being formed at a predetermined position of the substrate during formation of the first pattern, a second alignment reference mark of a predetermined symmetric shape being formed, in predetermined positional relationship to the first alignment reference mark, at a predetermined position of the substrate during formation of the second pattern. This apparatus comprises: a detector that optically detects the first alignment reference mark and the second alignment reference mark formed on the substrate and thereby obtains dimension detection data of the first alignment reference mark or the second alignment reference mark as well as respective position detection data of the first and second alignment reference marks; a determination section that determines respective symmetry centers of the first and second alignment reference marks on the basis of the respective position detection data of the first and second alignment reference marks and determines an error of the alignment between the first and second patterns on the basis of a positional deviation between the determined respective symmetry centers of the first and second alignment reference marks; and an evaluation section that evaluates accuracy of determination, by the determination section, of the error of the alignment between the first and second patterns on the basis of the dimension detection data of the first alignment reference mark or the second alignment reference mark.
The present invention is characterized by measuring the dimension of the first or second alignment reference mark in addition to evaluating the accuracy of the measurement of the pattern alignment error and also evaluating the dimension measurement of the first or second alignment reference mark, so that when the first or second alignment reference mark has been formed improperly, the invention can eliminate data of the pattern alignment error measurement. With this arrangement, the present invention can avoid deterioration in the accuracy of the pattern alignment error measurement and thus advantageously perform the pattern alignment error measurement with enhanced reliability. Further, the present invention is characterized in that the dimension detection data of the first or second alignment reference mark is obtained as the position detection data of the reference marks are obtained, so that the pattern alignment error measurement with enhanced accuracy and reliability can be performed in a short time.
The present invention may be constructed and implemented not only as the apparatus invention as discussed above but also as a method invention. Also, the present invention may be arranged and implemented as a software program for execution by a processor such as a computer or DSP, as well as a storage medium storing such a program. Further, the processor used in the present invention may comprise a dedicated processor with dedicated logic built in hardware, not to mention a computer or other general-purpose type processor capable of running a desired software program.
While the embodiments to be described herein represent the preferred form of the present invention, it is to be understood that various modifications will occur to those skilled in the art without departing from the spirit of the invention. The scope of the present invention is therefore to be determined solely by the appended claims.


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