Optics: measuring and testing – By light interference – For dimensional measurement
Reexamination Certificate
2001-05-10
2004-03-23
Allen, Stephone B. (Department: 2878)
Optics: measuring and testing
By light interference
For dimensional measurement
C356S500000
Reexamination Certificate
active
06710884
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention in general relates to interferometry and in particular to interferometric apparatus and methods by which the local surface characteristics of photolithographic stage mirrors or the like may be interferometrically measured in-situ to provide correction signals for enhanced distance measurement accuracy.
Interferometry is a well established metrology used extensively in microfabrication processes to measure and control a host of critical dimensions. It is especially important in manufacturing semiconductors and the like where requirements for precision are 10 to 40% better than critical dimensions of 0.1 &mgr;m or less.
Integrated circuits made of semiconductor materials are constructed by successively depositing and patterning layers of different materials on a silicon wafer while it typically resides in a flat exposure plane having Cartesian x-y coordinates to which there is a normal z-direction. The patterning process consists of a combination of exposure and development of photoresist followed by etching and doping of the underlying layers followed by the deposition of subsequent layers. This process results in a complex and, on the scale of microns, very nonhomogeneous material structure on the wafer surface.
Typically each wafer contains multiple copies of the same pattern called “fields” arrayed on the wafer in a nominally rectilinear distribution known as the “grid.” Often, but not always, each field corresponds to a single “chip.”
The exposure process consists of projecting the image of the next layer pattern onto (and into) the photoresist that has been spun onto the wafer. For an integrated circuit to function properly each successive projected image must be accurately matched to the patterns already on the wafer. The process of determining the position, orientation, and distortion of the patterns already on the wafer, and then placing them in the correct relation to the projected image, is termed “alignment.” The actual outcome, i.e., how accurately each successive patterned layer is matched to the previous layers, is termed “overlay.”
In general, the alignment process requires both translational and rotational positioning of the wafer and/or the projected image as well as some distortion of the image to match the actual shape of the patterns already present. The fact that the wafer and the image need to be positioned correctly to get one pattern on top of the other is obvious. Actual distortion of the image is often needed as well. Other effects, such as thermal and vibration, may require compensation as well.
The net consequence of all this is that the shape of the first-level pattern printed on the wafer is not ideal and all subsequent patterns must, to the extent possible, be adjusted to fit the overall shape of the first-level printed pattern. Different exposure tools have different capabilities to account for these effects, but, in general, the distortions or shape variations that can be accounted for include x and y magnification and skew. These distortions, when combined with translation and rotation, make up the complete set of linear transformations in the plane.
Since the problem is to successively match the projected image to the patterns already on the wafer, and not simply to position the wafer itself, the exposure tool must effectively be able to detect or infer the relative position, orientation, and distortion of both the wafer patterns themselves and the projected image.
It is difficult to directly sense circuit patterns themselves, and therefore, alignment is accomplished by adding fiducial marks or “alignment marks” to the circuit patterns. These alignment marks can be used to determine the reticle position, orientation, and distortion and/or the projected image position, orientation, and distortion. They can also be printed on the wafer along with the circuit pattern and hence can be used to determine the wafer pattern position, orientation, and distortion. Alignment marks generally consist of one or more clear or opaque lines on the reticle, which then become “trenches” or “mesas” when printed on the wafer. But more complex structures such as gratings, which are simply periodic arrays of trenches and/or mesas, and checkerboard patterns are also used. Alignment marks are usually located either along the edges of “kerf” of each field or a few “master marks” are distributed across the wafer. Although alignment marks are necessary, they are not part of the chip circuitry and therefore, from the chip maker's point of view, they waste valuable wafer area or “real estate.” This drives alignment marks to be as small as possible, and they are often less than a few hundred micrometers on a side.
Alignment sensors are incorporated into the exposure tool to “see” alignment marks. Generally there are separate sensors for the wafer, the reticle, and/or the projected image itself. Depending on the overall alignment strategy, these sensors may be entirety separate systems or they may be effectively combined into a single sensor. For example, a sensor that can see the projected image directly would nominally be “blind” with respect to wafer marks and hence a separate wafer sensor is required. But a sensor that “looks” at the wafer through the reticle alignment marks themselves is essentially performing reticle and wafer alignment simultaneously and hence no separate reticle sensor is necessary. Note that in this case the positions of the alignment marks in the projected image are being inferred from the positions of the reticle alignment marks and a careful calibration of reticle to image positions must have been performed before the alignment step.
Furthermore, as implied above, essentially all exposure tools use sensors that detect the wafer alignment marks optically. That is, the sensors project light at one or more wavelengths onto the wafer and detect the scattering/diffraction from the alignment marks as a function of position in the wafer plane. Many types of alignment sensors are in common use and their optical configurations cover the full spectrum from simple microscopes to heterodyne grating interferometers. Also, since different sensor configurations operate better or worse on given wafer types, most exposure tools carry more than one sensor configuration to allow for good overlay on the widest possible range of wafer types.
The overall job of an alignment sensor is to determine the position of each of a given subset of all the alignment marks on a wafer in a coordinate system fixed with respect to the exposure tool. These position data are then used in either of two generic ways termed “global” and “field-by-field” to perform alignment. In global alignment the marks in only a few fields are located by the alignment sensor(s) and the data are combined in a best-fit sense to determine the optimum alignment of all the fields on the wafer. In field-by-field alignment the data collected from a single field are used to align only that field. Global alignment is usually both faster, because not all the fields on the wafer are located, and less sensitive to noise, because it combines all the data together to find a best overall fit. But, since the results of the best fit are used in a feed-forward or dead reckoning approach, it does rely on the overall optomechanical stability of the exposure tool.
Alignment is generally implemented as a two-step process; that is, a fine alignment step with an accuracy of tens of nanometers follows an initial coarse alignment step with an accuracy of micrometers, and alignment requires positioning the wafer in all six degrees of freedom: three translation and three rotation. But adjusting the wafer so that it lies in the projected image plane, i.e., leveling and focusing the wafer, which involves one translational degree of freedom (motion along the optic axis, the z-axis or a parallel normal to the x-y wafer orientation) and two rotational degrees of freedom (orienting the plane of the wafer to be parallel to the projected image plane), is generally considered separate from
Allen Stephone B.
Caufield Francis J.
Zygo Corporation
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