Electrical computers and digital processing systems: processing – Architecture based instruction processing – Stack based computer
Reexamination Certificate
1999-03-18
2002-01-22
Pan, Daniel H. (Department: 2183)
Electrical computers and digital processing systems: processing
Architecture based instruction processing
Stack based computer
C712S201000, C712S217000, C712S211000, C711S132000, C711S134000, C711S201000, C711S217000
Reexamination Certificate
active
06341344
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates in general to central processing units, and more particularly, to an apparatus and method for manipulating data from processors on a stack memory.
BACKGROUND OF THE INVENTION
Reading and writing data with the use of registers on a processor is known in the art and used in nearly all computer architecture applications. Processors read and write to data memory in the course of performing operations. Read and write operations also may occur to and from a memory block attached to the central processing unit (“CPU”) of a computer that is reserved for stack operations. This memory may be called the stack memory. The stack memory is used for passing parameters or as a temporary storage for data. The stack memory is also used for saving and restoring data from registers during interrupts. During an interrupt, registers automatically save and restore using read and write operations on the stack memory. Processors generally have an address register called a stack pointer that indicates the address of the top data word on the stack memory. The stack memory increases from low to high and the stack pointer generally points to the next empty location. Alternatively, the stack memory may increase from high to low.
Read and write operations may be performed on the stack memory by incrementing or decrementing the stack pointer. The stack pointer is a register that contains a value equal to the address of the empty location that currently is on top of the stack memory. A read operation is performed on the stack memory by decrementing the contents of the stack pointer and reading the memory data at the address indicated by the updated stack pointer. This operation is referred to as a stack POP operation. Write operations are performed by writing the memory data at the address indicated by the stack pointer and incrementing the contents of the stack pointer. This operation is referred to as a stack PUSH operation. Data may be read out of the stack memory but is not physically removed. A new data word may be written in the memory address that has been read out.
All 32-bit data access operations to a 16-bit stack memory are even address aligned. If the stack pointer is aligned with an odd address location before an operation, a value written starts from the next lowest even address. In general, computer devices ensure the stack pointer is always aligned before an interrupt occurs, especially when the stack pointer points to 16-bit memory locations and 32-bit register save/restore operations are executed. Thus, a stack pointer pointing to an odd address during a write operation on the stack memory decrements itself to the even address below the odd address. During the write operation, the incoming data overwrites data at the odd address initially indicated by the stack pointer, causing an error. Data in the odd address will be corrupted by the overwrite.
Data saved on the stack may consist of a mixture of 16 and 32-bit data words. When mixing data words, if the number of 16-bit values is not an even multiple between the 32-bit values, then memory holes are created as the stack pointer aligns with an even address prior to any operations on the stack memory.
High level language compilers may require that the alignment of the stack memory always be known. During an interrupt, the state of the stack memory may be unknown. Knowing the state of the stack memory enables the previous state to be restored when the interrupt is complete.
SUMMARY OF THE INVENTION
From the foregoing, it may be appreciated that a need has arisen for a method performing operations on a stack memory without corrupting data during alignments. In accordance with the present invention, an apparatus and method for manipulating data from a processor on a stack memory is provided that substantially eliminates or reduces disadvantages and problems associated with conventional stack memory operations.
An apparatus for manipulating data from a processor on a stack memory is disclosed. The apparatus has a stack pointer on the stack memory and a first memory address aligned with the stack pointer. The apparatus further has a second memory address. The second memory address is determined by incrementing the stack pointer from the first memory address when data is saved into the stack memory. The stack pointer decrements from the second memory address back to the first memory address when data is restored from the stack memory. The apparatus further has at least one register having data saved into the stack memory at the second memory address and restored back to the at least one register. The apparatus further has an alignment device aligning the stack pointer when the pointer indicates an odd address after data has been saved to the stack memory, and unaligning the stack pointer prior to restoring data from the stack memory. The alignment device further aligns the stack pointer to a next even address when the stack pointer indicates an odd address. The apparatus further has a stack pointer align bit that is equal to one when the alignment device aligns the stack pointer.
In another embodiment, a method for manipulating data from a processor on a stack memory for use in accordance with the present invention comprises eight steps. The first step comprises aligning a stack pointer in the stack memory to a first memory address. The second step comprises incrementing the stack pointer to a second memory address to create an empty memory address in the stack memory. The third step comprises saving data from at least one register into the stack memory at the second memory address, indicated by the stack pointer. The fourth step comprises aligning the stack pointer to a next even address and setting a stack pointer align bit on the register equal to one when the stack pointer indicates an odd address after the saving step is complete. The fifth step comprises performing processor operations. The sixth step comprises unaligning the stack pointer from the next even address to the odd address when the second aligning step is executed and the stack pointer align bit is equal to one. The seventh step comprises restoring data from the stack memory into the register after completion of the processor operations. The eighth step comprises decrementing the stack pointer from the second memory address to the first memory address and removing the empty memory address.
A technical advantage of the present invention is that a method of manipulating data from a processor on a stack memory is provided. Another technical advantage of the present invention is that address registers will not be corrupted by overwriting during alignment operations. Another technical advantage of the present invention is that stack memory usage and memory costs are reduced. Another technical advantage of the present invention is that memory holes are decreased in the stack memory, thereby increasing the availability of the stack memory.
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Langdon, Jr., “Computer Design” 1982, pp. 103-106 and 115-118.
Mehendale Mahesh
Tessarolo Alexander
Brady W. James
Pan Daniel H.
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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