Apparatus and method for managing a frame buffer for MPEG video

Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors

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Details

345509, 345521, 345202, 348416, 348584, 348715, 348718, G06F 1300

Patent

active

059092246

ABSTRACT:
A four-buffer MPEG decoder is provided for decoding MPEG video frames. A four-buffer frame controller and control method manage the four frame buffers including decoding, displaying and discarding of I-frames, P-frames and B-frames so that video data decoding is accelerated. The four-buffer frame controller and control method frees one frame buffer when the frame buffer contains obsolete data, defined as data which is no longer useful for decoding additional frames and for which storage is not necessary for displaying pictures in a correct temporal order. One example of an obsolete frame is a B-frame that is displayed. Another example is a P-frame for I-frame which is no longer used for motion compensation and has been displayed.

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patent: 5576765 (1996-11-01), Cheney et al.
patent: 5668599 (1997-09-01), Cheney et al.
patent: 5729279 (1998-03-01), Fuller

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